memtest-ruby.py revision 9826:014ff1fbff6d
112855Sgabeblack@google.com# Copyright (c) 2006-2007 The Regents of The University of Michigan 212855Sgabeblack@google.com# Copyright (c) 2010 Advanced Micro Devices, Inc. 312855Sgabeblack@google.com# All rights reserved. 412855Sgabeblack@google.com# 512855Sgabeblack@google.com# Redistribution and use in source and binary forms, with or without 612855Sgabeblack@google.com# modification, are permitted provided that the following conditions are 712855Sgabeblack@google.com# met: redistributions of source code must retain the above copyright 812855Sgabeblack@google.com# notice, this list of conditions and the following disclaimer; 912855Sgabeblack@google.com# redistributions in binary form must reproduce the above copyright 1012855Sgabeblack@google.com# notice, this list of conditions and the following disclaimer in the 1112855Sgabeblack@google.com# documentation and/or other materials provided with the distribution; 1212855Sgabeblack@google.com# neither the name of the copyright holders nor the names of its 1312855Sgabeblack@google.com# contributors may be used to endorse or promote products derived from 1412855Sgabeblack@google.com# this software without specific prior written permission. 1512855Sgabeblack@google.com# 1612855Sgabeblack@google.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1712855Sgabeblack@google.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1812855Sgabeblack@google.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1912855Sgabeblack@google.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2012855Sgabeblack@google.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2112855Sgabeblack@google.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2212855Sgabeblack@google.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2312855Sgabeblack@google.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2412855Sgabeblack@google.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2512855Sgabeblack@google.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2612855Sgabeblack@google.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2712855Sgabeblack@google.com# 2812855Sgabeblack@google.com# Authors: Ron Dreslinski 2912855Sgabeblack@google.com 3012855Sgabeblack@google.comimport m5 3112855Sgabeblack@google.comfrom m5.objects import * 3212855Sgabeblack@google.comfrom m5.defines import buildEnv 3312855Sgabeblack@google.comfrom m5.util import addToPath 3412855Sgabeblack@google.comimport os, optparse, sys 3512855Sgabeblack@google.com 3612855Sgabeblack@google.com# Get paths we might need 3712855Sgabeblack@google.comconfig_path = os.path.dirname(os.path.abspath(__file__)) 3812855Sgabeblack@google.comconfig_root = os.path.dirname(config_path) 3912855Sgabeblack@google.comm5_root = os.path.dirname(config_root) 4012855Sgabeblack@google.comaddToPath(config_root+'/configs/common') 4112855Sgabeblack@google.comaddToPath(config_root+'/configs/ruby') 4212855Sgabeblack@google.comaddToPath(config_root+'/configs/topologies') 4312855Sgabeblack@google.com 4412855Sgabeblack@google.comimport Ruby 4512855Sgabeblack@google.comimport Options 4612855Sgabeblack@google.com 4712855Sgabeblack@google.comparser = optparse.OptionParser() 4812855Sgabeblack@google.comOptions.addCommonOptions(parser) 4912855Sgabeblack@google.com 5012855Sgabeblack@google.com# Add the ruby specific and protocol specific options 5112855Sgabeblack@google.comRuby.define_options(parser) 5212855Sgabeblack@google.com 5312855Sgabeblack@google.com(options, args) = parser.parse_args() 5412855Sgabeblack@google.com 5512855Sgabeblack@google.com# 5612855Sgabeblack@google.com# Set the default cache size and associativity to be very small to encourage 5712855Sgabeblack@google.com# races between requests and writebacks. 5812855Sgabeblack@google.com# 5912855Sgabeblack@google.comoptions.l1d_size="256B" 6012855Sgabeblack@google.comoptions.l1i_size="256B" 6112855Sgabeblack@google.comoptions.l2_size="512B" 6212855Sgabeblack@google.comoptions.l3_size="1kB" 6312855Sgabeblack@google.comoptions.l1d_assoc=2 6412855Sgabeblack@google.comoptions.l1i_assoc=2 6512855Sgabeblack@google.comoptions.l2_assoc=2 6612855Sgabeblack@google.comoptions.l3_assoc=2 6712855Sgabeblack@google.com 6812855Sgabeblack@google.com#MAX CORES IS 8 with the fals sharing method 6912855Sgabeblack@google.comnb_cores = 8 7012855Sgabeblack@google.com 7112855Sgabeblack@google.com# ruby does not support atomic, functional, or uncacheable accesses 7212855Sgabeblack@google.comcpus = [ MemTest(atomic=False, percent_functional=50, 7312855Sgabeblack@google.com percent_uncacheable=0, suppress_func_warnings=True) \ 7412855Sgabeblack@google.com for i in xrange(nb_cores) ] 7512855Sgabeblack@google.com 7612855Sgabeblack@google.com# overwrite options.num_cpus with the nb_cores value 7712855Sgabeblack@google.comoptions.num_cpus = nb_cores 7812855Sgabeblack@google.com 7912855Sgabeblack@google.com# system simulated 8012855Sgabeblack@google.comsystem = System(cpu = cpus, 8112855Sgabeblack@google.com funcmem = SimpleMemory(in_addr_map = False), 8212855Sgabeblack@google.com physmem = SimpleMemory(null = True), 8312855Sgabeblack@google.com funcbus = NoncoherentBus(), 8412855Sgabeblack@google.com clk_domain = SrcClockDomain(clock = options.sys_clock)) 8512855Sgabeblack@google.com 8612855Sgabeblack@google.com# Create a seperate clock domain for components that should run at 8712855Sgabeblack@google.com# CPUs frequency 88system.cpu_clk_domain = SrcClockDomain(clock = '2GHz') 89 90# All cpus are associated with cpu_clk_domain 91for cpu in cpus: 92 cpu.clk_domain = system.cpu_clk_domain 93 94system.mem_ranges = AddrRange('256MB') 95 96Ruby.create_system(options, system) 97 98# Create a separate clock domain for Ruby 99system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock) 100 101assert(len(cpus) == len(system.ruby._cpu_ruby_ports)) 102 103for (i, ruby_port) in enumerate(system.ruby._cpu_ruby_ports): 104 # 105 # Tie the cpu test and functional ports to the ruby cpu ports and 106 # physmem, respectively 107 # 108 cpus[i].test = ruby_port.slave 109 cpus[i].functional = system.funcbus.slave 110 111 # 112 # Since the memtester is incredibly bursty, increase the deadlock 113 # threshold to 1 million cycles 114 # 115 ruby_port.deadlock_threshold = 1000000 116 117# connect reference memory to funcbus 118system.funcmem.port = system.funcbus.master 119 120# ----------------------- 121# run simulation 122# ----------------------- 123 124root = Root(full_system = False, system = system) 125root.system.mem_mode = 'timing' 126 127# Not much point in this being higher than the L1 latency 128m5.ticks.setGlobalFrequency('1ns') 129