memtest-ruby.py revision 8920:99083b5b7ed4
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2010 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
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9# redistributions in binary form must reproduce the above copyright
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12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Ron Dreslinski
29
30import m5
31from m5.objects import *
32from m5.defines import buildEnv
33from m5.util import addToPath
34import os, optparse, sys
35
36# Get paths we might need
37config_path = os.path.dirname(os.path.abspath(__file__))
38config_root = os.path.dirname(config_path)
39m5_root = os.path.dirname(config_root)
40addToPath(config_root+'/configs/common')
41addToPath(config_root+'/configs/ruby')
42
43import Ruby
44import Options
45
46parser = optparse.OptionParser()
47Options.addCommonOptions(parser)
48
49# Add the ruby specific and protocol specific options
50Ruby.define_options(parser)
51
52(options, args) = parser.parse_args()
53
54#
55# Set the default cache size and associativity to be very small to encourage
56# races between requests and writebacks.
57#
58options.l1d_size="256B"
59options.l1i_size="256B"
60options.l2_size="512B"
61options.l3_size="1kB"
62options.l1d_assoc=2
63options.l1i_assoc=2
64options.l2_assoc=2
65options.l3_assoc=2
66
67#MAX CORES IS 8 with the fals sharing method
68nb_cores = 8
69
70# ruby does not support atomic, functional, or uncacheable accesses
71cpus = [ MemTest(atomic=False, percent_functional=50,
72                 percent_uncacheable=0, suppress_func_warnings=True) \
73         for i in xrange(nb_cores) ]
74
75# overwrite options.num_cpus with the nb_cores value
76options.num_cpus = nb_cores
77
78# system simulated
79system = System(cpu = cpus,
80                funcmem = PhysicalMemory(),
81                physmem = PhysicalMemory())
82
83Ruby.create_system(options, system)
84
85assert(len(cpus) == len(system.ruby._cpu_ruby_ports))
86
87for (i, ruby_port) in enumerate(system.ruby._cpu_ruby_ports):
88     #
89     # Tie the cpu test and functional ports to the ruby cpu ports and
90     # physmem, respectively
91     #
92     cpus[i].test = ruby_port.slave
93     cpus[i].functional = system.funcmem.port
94
95     #
96     # Since the memtester is incredibly bursty, increase the deadlock
97     # threshold to 1 million cycles
98     #
99     ruby_port.deadlock_threshold = 1000000
100
101     #
102     # Ruby doesn't need the backing image of memory when running with
103     # the tester.
104     #
105     ruby_port.access_phys_mem = False
106
107# -----------------------
108# run simulation
109# -----------------------
110
111root = Root(full_system = False, system = system)
112root.system.mem_mode = 'timing'
113
114# Not much point in this being higher than the L1 latency
115m5.ticks.setGlobalFrequency('1ns')
116