memtest-ruby.py revision 8436 
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2010 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;
9# redistributions in binary form must reproduce the above copyright
10# notice, this list of conditions and the following disclaimer in the
11# documentation and/or other materials provided with the distribution;
12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Ron Dreslinski
29
30import m5
31from m5.objects import *
32from m5.defines import buildEnv
33from m5.util import addToPath
34import os, optparse, sys
35
36if buildEnv['FULL_SYSTEM']:
37    panic("This script requires system-emulation mode (*_SE).")
38
39# Get paths we might need
40config_path = os.path.dirname(os.path.abspath(__file__))
41config_root = os.path.dirname(config_path)
42m5_root = os.path.dirname(config_root)
43addToPath(config_root+'/configs/common')
44addToPath(config_root+'/configs/ruby')
45
46import Ruby
47
48parser = optparse.OptionParser()
49
50#
51# Add the ruby specific and protocol specific options
52#
53Ruby.define_options(parser)
54
55execfile(os.path.join(config_root, "configs/common", "Options.py"))
56
57(options, args) = parser.parse_args()
58
59#
60# Set the default cache size and associativity to be very small to encourage
61# races between requests and writebacks.
62#
63options.l1d_size="256B"
64options.l1i_size="256B"
65options.l2_size="512B"
66options.l3_size="1kB"
67options.l1d_assoc=2
68options.l1i_assoc=2
69options.l2_assoc=2
70options.l3_assoc=2
71
72#MAX CORES IS 8 with the fals sharing method
73nb_cores = 8
74
75# ruby does not support atomic, functional, or uncacheable accesses
76cpus = [ MemTest(atomic=False, percent_functional=50,
77                 percent_uncacheable=0, suppress_func_warnings=True) \
78         for i in xrange(nb_cores) ]
79
80# overwrite options.num_cpus with the nb_cores value
81options.num_cpus = nb_cores
82
83# system simulated
84system = System(cpu = cpus,
85                funcmem = PhysicalMemory(),
86                physmem = PhysicalMemory())
87
88Ruby.create_system(options, system)
89
90assert(len(cpus) == len(system.ruby._cpu_ruby_ports))
91
92for (i, ruby_port) in enumerate(system.ruby._cpu_ruby_ports):
93     #
94     # Tie the cpu test and functional ports to the ruby cpu ports and
95     # physmem, respectively
96     #
97     cpus[i].test = ruby_port.port
98     cpus[i].functional = system.funcmem.port
99
100     #
101     # Since the memtester is incredibly bursty, increase the deadlock
102     # threshold to 1 million cycles
103     #
104     ruby_port.deadlock_threshold = 1000000
105
106     #
107     # Ruby doesn't need the backing image of memory when running with
108     # the tester.
109     #
110     ruby_port.access_phys_mem = False
111
112# -----------------------
113# run simulation
114# -----------------------
115
116root = Root(system = system)
117root.system.mem_mode = 'timing'
118
119# Not much point in this being higher than the L1 latency
120m5.ticks.setGlobalFrequency('1ns')
121