gpu-randomtest-ruby.py revision 11308
110719SMarco.Balboni@ARM.com#
29036SN/A#  Copyright (c) 2010-2015 Advanced Micro Devices, Inc.
39036SN/A#  All rights reserved.
49036SN/A#
59036SN/A#  For use for simulation and test purposes only
69036SN/A#
79036SN/A#  Redistribution and use in source and binary forms, with or without
89036SN/A#  modification, are permitted provided that the following conditions are met:
99036SN/A#
109036SN/A#  1. Redistributions of source code must retain the above copyright notice,
119036SN/A#  this list of conditions and the following disclaimer.
129036SN/A#
135354SN/A#  2. Redistributions in binary form must reproduce the above copyright notice,
144486SN/A#  this list of conditions and the following disclaimer in the documentation
154486SN/A#  and/or other materials provided with the distribution.
164486SN/A#
174486SN/A#  3. Neither the name of the copyright holder nor the names of its contributors
184486SN/A#  may be used to endorse or promote products derived from this software
194486SN/A#  without specific prior written permission.
204486SN/A#
214486SN/A#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
224486SN/A#  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
234486SN/A#  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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314486SN/A#  POSSIBILITY OF SUCH DAMAGE.
324486SN/A#
334486SN/A#  Author: Brad Beckmann
344486SN/A#
354486SN/A
364486SN/Aimport m5
374486SN/Afrom m5.objects import *
384486SN/Afrom m5.defines import buildEnv
394486SN/Afrom m5.util import addToPath
409036SN/Aimport os, optparse, sys
414486SN/A
429036SN/A# Get paths we might need.  It's expected this file is in m5/configs/example.
439524SN/Aconfig_path = os.path.dirname(os.path.abspath(__file__))
443102SN/Aconfig_root = os.path.dirname(config_path)
459524SN/Am5_root = os.path.dirname(config_root)
4610399SN/AaddToPath(config_root+'/configs/common')
474486SN/AaddToPath(config_root+'/configs/ruby')
4810405Sandreas.hansson@arm.comaddToPath(config_root+'/configs/topologies')
4910405Sandreas.hansson@arm.com
509036SN/Aimport Ruby
5110405Sandreas.hansson@arm.comimport Options
5210719SMarco.Balboni@ARM.com
5310719SMarco.Balboni@ARM.comparser = optparse.OptionParser()
5410719SMarco.Balboni@ARM.comOptions.addCommonOptions(parser)
5510719SMarco.Balboni@ARM.com
5610719SMarco.Balboni@ARM.com# add the gpu specific options expected by the the gpu and gpu_RfO
5710719SMarco.Balboni@ARM.comparser.add_option("-u", "--num-compute-units", type="int", default=8,
5810719SMarco.Balboni@ARM.com                  help="number of compute units in the GPU")
5910719SMarco.Balboni@ARM.comparser.add_option("--numCPs", type="int", default=0,
6010719SMarco.Balboni@ARM.com                  help="Number of GPU Command Processors (CP)")
6110719SMarco.Balboni@ARM.comparser.add_option("--simds-per-cu", type="int", default=4, help="SIMD units" \
6210719SMarco.Balboni@ARM.com                  "per CU")
6310719SMarco.Balboni@ARM.comparser.add_option("--wf-size", type="int", default=64,
6410719SMarco.Balboni@ARM.com                  help="Wavefront size(in workitems)")
6510719SMarco.Balboni@ARM.comparser.add_option("--wfs-per-simd", type="int", default=10, help="Number of " \
6610719SMarco.Balboni@ARM.com                  "WF slots per SIMD")
6710719SMarco.Balboni@ARM.com
6810719SMarco.Balboni@ARM.com# Add the ruby specific and protocol specific options
6910720Sandreas.hansson@arm.comRuby.define_options(parser)
7010720Sandreas.hansson@arm.com
7110720Sandreas.hansson@arm.com(options, args) = parser.parse_args()
7210719SMarco.Balboni@ARM.com
7310719SMarco.Balboni@ARM.com#
7410720Sandreas.hansson@arm.com# Set the default cache size and associativity to be very small to encourage
759036SN/A# races between requests and writebacks.
769036SN/A#
779036SN/Aoptions.l1d_size="256B"
789036SN/Aoptions.l1i_size="256B"
799036SN/Aoptions.l2_size="512B"
809036SN/Aoptions.l3_size="1kB"
819036SN/Aoptions.l1d_assoc=2
829036SN/Aoptions.l1i_assoc=2
839036SN/Aoptions.l2_assoc=2
8410405Sandreas.hansson@arm.comoptions.l3_assoc=2
859036SN/Aoptions.num_compute_units=8
869036SN/Aoptions.num_sqc=2
879036SN/A
8810405Sandreas.hansson@arm.com# Check to for the GPU_RfO protocol.  Other GPU protocols are non-SC and will
8910405Sandreas.hansson@arm.com# not work with the Ruby random tester.
9010405Sandreas.hansson@arm.comassert(buildEnv['PROTOCOL'] == 'GPU_RfO')
919036SN/A
9210405Sandreas.hansson@arm.com#
9310405Sandreas.hansson@arm.com# create the tester and system, including ruby
9410405Sandreas.hansson@arm.com#
959524SN/Atester = RubyTester(check_flush = False, checks_to_complete = 100,
9610719SMarco.Balboni@ARM.com                    wakeup_frequency = 10, num_cpus = options.num_cpus)
9710719SMarco.Balboni@ARM.com
9810720Sandreas.hansson@arm.com# We set the testers as cpu for ruby to find the correct clock domains
9910719SMarco.Balboni@ARM.com# for the L1 Objects.
10010719SMarco.Balboni@ARM.comsystem = System(cpu = tester)
10110719SMarco.Balboni@ARM.com
10210719SMarco.Balboni@ARM.com# Dummy voltage domain for all our clock domains
10311334Sandreas.hansson@arm.comsystem.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
10411334Sandreas.hansson@arm.comsystem.clk_domain = SrcClockDomain(clock = '1GHz',
10511334Sandreas.hansson@arm.com                                   voltage_domain = system.voltage_domain)
10611334Sandreas.hansson@arm.com
10711334Sandreas.hansson@arm.comsystem.mem_ranges = AddrRange('256MB')
10811334Sandreas.hansson@arm.com
10910405Sandreas.hansson@arm.comRuby.create_system(options, False, system)
11010399SN/A
11110399SN/A# Create a separate clock domain for Ruby
11210399SN/Asystem.ruby.clk_domain = SrcClockDomain(clock = '1GHz',
11310399SN/A                                        voltage_domain = system.voltage_domain)
11410719SMarco.Balboni@ARM.com
11510719SMarco.Balboni@ARM.comtester.num_cpus = len(system.ruby._cpu_ports)
11610719SMarco.Balboni@ARM.com
11710719SMarco.Balboni@ARM.com#
11810399SN/A# The tester is most effective when randomization is turned on and
11910405Sandreas.hansson@arm.com# artifical delay is randomly inserted on messages
12010720Sandreas.hansson@arm.com#
12111132Sali.jafri@arm.comsystem.ruby.randomization = True
12211132Sali.jafri@arm.com
12311132Sali.jafri@arm.comfor ruby_port in system.ruby._cpu_ports:
12410720Sandreas.hansson@arm.com    #
12510720Sandreas.hansson@arm.com    # Tie the ruby tester ports to the ruby cpu read and write ports
12610720Sandreas.hansson@arm.com    #
12710720Sandreas.hansson@arm.com    if ruby_port.support_data_reqs and ruby_port.support_inst_reqs:
12810720Sandreas.hansson@arm.com        tester.cpuInstDataPort = ruby_port.slave
12910720Sandreas.hansson@arm.com    elif ruby_port.support_data_reqs:
13010720Sandreas.hansson@arm.com        tester.cpuDataPort = ruby_port.slave
13110720Sandreas.hansson@arm.com    elif ruby_port.support_inst_reqs:
13210720Sandreas.hansson@arm.com        tester.cpuInstPort = ruby_port.slave
13310720Sandreas.hansson@arm.com
13410720Sandreas.hansson@arm.com    # Do not automatically retry stalled Ruby requests
13510720Sandreas.hansson@arm.com    ruby_port.no_retry_on_stall = True
13610720Sandreas.hansson@arm.com
13711132Sali.jafri@arm.com    #
13811132Sali.jafri@arm.com    # Tell the sequencer this is the ruby tester so that it
13911132Sali.jafri@arm.com    # copies the subblock back to the checker
14011132Sali.jafri@arm.com    #
14111132Sali.jafri@arm.com    ruby_port.using_ruby_tester = True
14210720Sandreas.hansson@arm.com
14310720Sandreas.hansson@arm.com# -----------------------
14410720Sandreas.hansson@arm.com# run simulation
14510720Sandreas.hansson@arm.com# -----------------------
14610720Sandreas.hansson@arm.com
14710720Sandreas.hansson@arm.comroot = Root(full_system = False, system = system )
14810720Sandreas.hansson@arm.comroot.system.mem_mode = 'timing'
14910720Sandreas.hansson@arm.com
15010720Sandreas.hansson@arm.com# Not much point in this being higher than the L1 latency
15110720Sandreas.hansson@arm.comm5.ticks.setGlobalFrequency('1ns')
15210720Sandreas.hansson@arm.com