ev5_osfalpha_defs.h revision 7997:b91bdbee66c3
111308Santhony.gutierrez@amd.com#ifndef EV5_OSFALPHA_DEFS_INCLUDED 211308Santhony.gutierrez@amd.com#define EV5_OSFALPHA_DEFS_INCLUDED 1 311308Santhony.gutierrez@amd.com 411308Santhony.gutierrez@amd.com 511308Santhony.gutierrez@amd.com// from ev5_osfalpha_defs.mar from Lance's fetch directory 611308Santhony.gutierrez@amd.com// lowercaseified and $ changed to _ and reformatting for gas...pb Nov/95 711308Santhony.gutierrez@amd.com 811308Santhony.gutierrez@amd.com//orig .MACRO $OSF_ALPHADEFS 911308Santhony.gutierrez@amd.com//orig OSF_ALPHADEF_VER == 5 ; Flag the version number of this file. 1011308Santhony.gutierrez@amd.com//orig .ENDM 1111308Santhony.gutierrez@amd.com//orig .MACRO $OSF_PSDEF,$GBL 1211308Santhony.gutierrez@amd.com//orig $DEFINI OSFPS,$GBL 1311308Santhony.gutierrez@amd.com//orig;+ 1411308Santhony.gutierrez@amd.com//orig; PS Layout - PS 1511308Santhony.gutierrez@amd.com//orig; Loc Size name function 1611308Santhony.gutierrez@amd.com//orig; ------ ------ ----- ----------------------------------- 1711308Santhony.gutierrez@amd.com//orig; <0:2> 3 IPL Prio level 1811308Santhony.gutierrez@amd.com//orig; <3> 1 CM Current Mode 1911308Santhony.gutierrez@amd.com//orig;- 2011308Santhony.gutierrez@amd.com 2111308Santhony.gutierrez@amd.com#define osfps_v_mode 3 2211308Santhony.gutierrez@amd.com#define osfps_m_mode (1<<osfps_v_mode) 2311308Santhony.gutierrez@amd.com#define osfps_v_ipl 0 2411308Santhony.gutierrez@amd.com#define osfps_m_ipl (7<<osfps_v_ipl) 2511308Santhony.gutierrez@amd.com 2611308Santhony.gutierrez@amd.com#define osfipl_c_mchk 7 2711308Santhony.gutierrez@amd.com#define osfipl_c_rt 6 2811308Santhony.gutierrez@amd.com#define osfipl_c_clk 5 2911308Santhony.gutierrez@amd.com#define osfipl_c_dev1 4 3011308Santhony.gutierrez@amd.com#define osfipl_c_dev0 3 3111308Santhony.gutierrez@amd.com#define osfipl_c_sw1 2 3211308Santhony.gutierrez@amd.com#define osfipl_c_sw0 1 3311308Santhony.gutierrez@amd.com#define osfipl_c_zero 0 3411308Santhony.gutierrez@amd.com 3511308Santhony.gutierrez@amd.com#define osfint_c_mchk 2 3611308Santhony.gutierrez@amd.com#define osfint_c_clk 1 3711308Santhony.gutierrez@amd.com#define osfint_c_dev 3 3811308Santhony.gutierrez@amd.com#define osfint_c_ip 0 3911308Santhony.gutierrez@amd.com#define osfint_c_perf 4 4011308Santhony.gutierrez@amd.com#define osfint_c_passrel 5 4111308Santhony.gutierrez@amd.com 4211308Santhony.gutierrez@amd.com//orig _DEFEND OSFPS,_GBL,DEF 4311308Santhony.gutierrez@amd.com//orig .ENDM 4411308Santhony.gutierrez@amd.com 4511308Santhony.gutierrez@amd.com//orig;+ 4611308Santhony.gutierrez@amd.com//orig; PTE layout - symbol prefix osfpte_ 4711308Santhony.gutierrez@amd.com//orig; 4811308Santhony.gutierrez@amd.com//orig; Loc Size name function 4911308Santhony.gutierrez@amd.com//orig; ------ ------ ------ ----------------------------------- 5011308Santhony.gutierrez@amd.com//orig; <63:32> 32 PFN Page Frame Number 5111308Santhony.gutierrez@amd.com//orig; <31:16> 16 SOFT Bits reserved for software use 5211308Santhony.gutierrez@amd.com//orig; <15:14> 2 5311308Santhony.gutierrez@amd.com//orig; <13> 1 UWE User write enable 5411308Santhony.gutierrez@amd.com//orig; <12> 1 KWE Kernel write enable 5511308Santhony.gutierrez@amd.com//orig; <11:10> 2 5611308Santhony.gutierrez@amd.com//orig; <9> 1 URE User read enable 5711308Santhony.gutierrez@amd.com//orig; <8> 1 KRE Kernel read enable 5811308Santhony.gutierrez@amd.com//orig; <7:6> 2 RES Reserved SBZ 5911308Santhony.gutierrez@amd.com//orig; <5> 1 HPF Huge Page Flag 6011308Santhony.gutierrez@amd.com//orig; <4> 1 ASM Wild card address space number match 6111308Santhony.gutierrez@amd.com//orig; <3> 1 FOE Fault On execute 6211308Santhony.gutierrez@amd.com//orig; <2> 1 FOW Fault On Write 6311308Santhony.gutierrez@amd.com//orig; <1> 1 FOR Fault On Read 6411308Santhony.gutierrez@amd.com//orig; <0> 1 V valid bit 6511308Santhony.gutierrez@amd.com//orig;- 6611308Santhony.gutierrez@amd.com 6711308Santhony.gutierrez@amd.com//orig .MACRO _OSF_PTEDEF,_GBL 6811308Santhony.gutierrez@amd.com//orig _DEFINI OSFPTE,_GBL 6911308Santhony.gutierrez@amd.com 7011308Santhony.gutierrez@amd.com#define osfpte_v_pfn 32 7111308Santhony.gutierrez@amd.com#define osfpte_m_soft (0xFFFF0000) 72#define osfpte_v_soft 16 73#define osfpte_m_uwe (0x2000) 74#define osfpte_v_uwe 13 75#define osfpte_m_kwe (0x1000) 76#define osfpte_v_kwe 12 77#define osfpte_m_ure (0x0200) 78#define osfpte_v_ure 9 79#define osfpte_m_kre (0x0100) 80#define osfpte_v_kre 8 81#define osfpte_m_hpf (0x0020) 82#define osfpte_v_hpf 5 83#define osfpte_m_asm (0x0010) 84#define osfpte_v_asm 4 85#define osfpte_m_foe (0x0008) 86#define osfpte_v_foe 3 87#define osfpte_m_fow (0x0004) 88#define osfpte_v_fow 2 89#define osfpte_m_for (0x0002) 90#define osfpte_v_for 1 91#define osfpte_m_v (0x0001) 92#define osfpte_v_v 0 93 94#define osfpte_m_ksegbits (osfpte_m_kre | osfpte_m_kwe | osfpte_m_v | osfpte_m_asm) 95#define osfpte_m_prot (osfpte_m_ure+osfpte_m_uwe | osfpte_m_kre | osfpte_m_kwe) 96 97//orig _DEFEND OSFPTE,_GBL,DEF 98//orig .ENDM 99 100//orig;+ 101//orig; VA layout - symbol prefix VA_ 102//orig; 103//orig; Loc Size name function 104//orig; ------ ------ ------- ----------------------------------- 105//orig; <42:33> 10 SEG1 First seg table offset for mapping 106//orig; <32:23> 10 SEG2 Second seg table offset for mapping 107//orig; <22:13> 10 SEG3 Third seg table offset for mapping 108//orig; <12:0> 13 OFFSET Byte within page 109//orig;- 110//orig .MACRO _OSF_VADEF,_GBL 111//orig _DEFINI OSFVA,_GBL 112 113#define osfva_m_offset (0x000000001FFF) 114#define osfva_v_offset 0 115#define osfva_m_seg3 (0x0000007FE000) 116#define osfva_v_seg3 13 117#define osfva_m_seg2 (0x0001FF800000) 118#define osfva_v_seg2 23 119#define osfva_m_seg1 (0x7FE00000000) 120#define osfva_v_seg1 33 121 122//orig _DEFEND OSFVA,_GBL,DEF 123//orig .ENDM 124//orig;+ 125//orig; PRIVILEGED CONTEXT BLOCK (PCB) 126//orig;- 127//orig .MACRO _OSF_PCBDEF,_GBL 128//orig _DEFINI OSFPCB,_GBL 129 130#define osfpcb_q_ksp (0x0000) 131#define osfpcb_q_usp (0x0008) 132#define osfpcb_q_Usp (0x0008) 133#define osfpcb_q_mmptr (0x0010) 134#define osfpcb_q_Mmptr (0x0010) 135#define osfpcb_l_cc (0x0018) 136#define osfpcb_l_asn (0x001C) 137#define osfpcb_q_unique (0x0020) 138#define osfpcb_q_fen (0x0028) 139#define osfpcb_v_pme 62 140 141//orig _DEFEND OSFPCB,_GBL,DEF 142//orig .ENDM 143//orig;+ 144//orig; Stack Frame 145//orig;- 146//orig .MACRO _OSF_SFDEF,_GBL 147//orig _DEFINI OSFSF,_GBL 148 149#define osfsf_ps (0x00) 150#define osfsf_pc (0x08) 151#define osfsf_gp (0x10) 152#define osfsf_a0 (0x18) 153#define osfsf_a1 (0x20) 154#define osfsf_a2 (0x28) 155#define osfsf_c_size (0x30) 156 157//orig _DEFEND OSFSF,_GBL,DEF 158//orig .ENDM 159 160#endif 161