ev5_defs.h revision 8013
18012Ssaidi@eecs.umich.edu/* 28013Sbinkertn@umich.edu * Copyright 1995 Hewlett-Packard Development Company, L.P. 38013Sbinkertn@umich.edu * 48013Sbinkertn@umich.edu * Permission is hereby granted, free of charge, to any person 58013Sbinkertn@umich.edu * obtaining a copy of this software and associated documentation 68013Sbinkertn@umich.edu * files (the "Software"), to deal in the Software without 78013Sbinkertn@umich.edu * restriction, including without limitation the rights to use, copy, 88013Sbinkertn@umich.edu * modify, merge, publish, distribute, sublicense, and/or sell copies 98013Sbinkertn@umich.edu * of the Software, and to permit persons to whom the Software is 108013Sbinkertn@umich.edu * furnished to do so, subject to the following conditions: 118013Sbinkertn@umich.edu * 128013Sbinkertn@umich.edu * The above copyright notice and this permission notice shall be 138013Sbinkertn@umich.edu * included in all copies or substantial portions of the Software. 148013Sbinkertn@umich.edu * 158013Sbinkertn@umich.edu * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 168013Sbinkertn@umich.edu * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 178013Sbinkertn@umich.edu * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 188013Sbinkertn@umich.edu * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 198013Sbinkertn@umich.edu * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 208013Sbinkertn@umich.edu * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 218013Sbinkertn@umich.edu * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 228013Sbinkertn@umich.edu * SOFTWARE. 238013Sbinkertn@umich.edu */ 248012Ssaidi@eecs.umich.edu 257997Ssaidi@eecs.umich.edu#ifndef EV5_DEFS_INCLUDED 267997Ssaidi@eecs.umich.edu#define EV5_DEFS_INCLUDED 1 277997Ssaidi@eecs.umich.edu 287997Ssaidi@eecs.umich.edu// adapted from the version emailed to lance..pb Nov/95 297997Ssaidi@eecs.umich.edu 308013Sbinkertn@umich.edu// In the definitions below, registers are annotated with one of the 318013Sbinkertn@umich.edu// following symbols: 327997Ssaidi@eecs.umich.edu// 338013Sbinkertn@umich.edu// RW - The register may be read and written 347997Ssaidi@eecs.umich.edu// RO - The register may only be read 357997Ssaidi@eecs.umich.edu// WO - The register may only be written 367997Ssaidi@eecs.umich.edu// 378013Sbinkertn@umich.edu// For RO and WO registers, all bits and fields within the register 388013Sbinkertn@umich.edu// are also read-only or write-only. For RW registers, each bit or 398013Sbinkertn@umich.edu// field within the register is annotated with one of the following: 407997Ssaidi@eecs.umich.edu// 417997Ssaidi@eecs.umich.edu// RW - The bit/field may be read and written 427997Ssaidi@eecs.umich.edu// RO - The bit/field may be read; writes are ignored 438013Sbinkertn@umich.edu// WO - The bit/field may be written; reads return an UNPREDICTABLE result 447997Ssaidi@eecs.umich.edu// WZ - The bit/field may be written; reads return a 0 457997Ssaidi@eecs.umich.edu// WC - The bit/field may be read; writes cause state to clear 468013Sbinkertn@umich.edu// RC - The bit/field may be read, which also causes state to clear; 478013Sbinkertn@umich.edu// writes are ignored 487997Ssaidi@eecs.umich.edu// Architecturally-defined (SRM) registers for EVMS 498013Sbinkertn@umich.edu 507997Ssaidi@eecs.umich.edu#define pt0 320 517997Ssaidi@eecs.umich.edu#define pt1 321 527997Ssaidi@eecs.umich.edu#define pt2 322 537997Ssaidi@eecs.umich.edu#define pt3 323 547997Ssaidi@eecs.umich.edu#define pt4 324 557997Ssaidi@eecs.umich.edu#define pt5 325 567997Ssaidi@eecs.umich.edu#define pt6 326 577997Ssaidi@eecs.umich.edu#define pt7 327 587997Ssaidi@eecs.umich.edu#define pt8 328 597997Ssaidi@eecs.umich.edu#define pt9 329 607997Ssaidi@eecs.umich.edu#define pt10 330 617997Ssaidi@eecs.umich.edu#define pt11 331 627997Ssaidi@eecs.umich.edu#define pt12 332 637997Ssaidi@eecs.umich.edu#define pt13 333 647997Ssaidi@eecs.umich.edu#define pt14 334 657997Ssaidi@eecs.umich.edu#define pt15 335 667997Ssaidi@eecs.umich.edu#define pt16 336 677997Ssaidi@eecs.umich.edu#define pt17 337 687997Ssaidi@eecs.umich.edu#define pt18 338 697997Ssaidi@eecs.umich.edu#define pt19 339 707997Ssaidi@eecs.umich.edu#define pt20 340 717997Ssaidi@eecs.umich.edu#define pt21 341 727997Ssaidi@eecs.umich.edu#define pt22 342 737997Ssaidi@eecs.umich.edu#define pt23 343 747997Ssaidi@eecs.umich.edu#define cbox_ipr_offset 16777200 757997Ssaidi@eecs.umich.edu#define sc_ctl 168 767997Ssaidi@eecs.umich.edu#define sc_stat 232 777997Ssaidi@eecs.umich.edu#define sc_addr 392 787997Ssaidi@eecs.umich.edu#define sc_addr_nm 392 797997Ssaidi@eecs.umich.edu#define sc_addr_fhm 392 807997Ssaidi@eecs.umich.edu#define bc_ctl 296 817997Ssaidi@eecs.umich.edu#define bc_config 456 827997Ssaidi@eecs.umich.edu#define ei_stat 360 837997Ssaidi@eecs.umich.edu#define ei_addr 328 847997Ssaidi@eecs.umich.edu#define fill_syn 104 857997Ssaidi@eecs.umich.edu#define bc_tag_addr 264 867997Ssaidi@eecs.umich.edu#define ld_lock 488 877997Ssaidi@eecs.umich.edu#define aster 266 887997Ssaidi@eecs.umich.edu#define astrr 265 897997Ssaidi@eecs.umich.edu#define exc_addr 267 907997Ssaidi@eecs.umich.edu#define exc_sum 268 917997Ssaidi@eecs.umich.edu#define exc_mask 269 927997Ssaidi@eecs.umich.edu#define hwint_clr 277 937997Ssaidi@eecs.umich.edu#define ic_flush_ctl 281 947997Ssaidi@eecs.umich.edu#define icperr_stat 282 957997Ssaidi@eecs.umich.edu#define ic_perr_stat 282 967997Ssaidi@eecs.umich.edu#define ic_row_map 283 977997Ssaidi@eecs.umich.edu#define icsr 280 987997Ssaidi@eecs.umich.edu#define ifault_va_form 274 997997Ssaidi@eecs.umich.edu#define intid 273 1007997Ssaidi@eecs.umich.edu#define ipl 272 1017997Ssaidi@eecs.umich.edu#define isr 256 1027997Ssaidi@eecs.umich.edu#define itb_is 263 1037997Ssaidi@eecs.umich.edu#define itb_asn 259 1047997Ssaidi@eecs.umich.edu#define itb_ia 261 1057997Ssaidi@eecs.umich.edu#define itb_iap 262 1067997Ssaidi@eecs.umich.edu#define itb_pte 258 1077997Ssaidi@eecs.umich.edu#define itb_pte_temp 260 1087997Ssaidi@eecs.umich.edu#define itb_tag 257 1097997Ssaidi@eecs.umich.edu#define ivptbr 275 1107997Ssaidi@eecs.umich.edu#define pal_base 270 1117997Ssaidi@eecs.umich.edu#define pmctr 284 1127997Ssaidi@eecs.umich.edu// this is not the register ps .. pb #define ps 271 1137997Ssaidi@eecs.umich.edu#define sirr 264 1147997Ssaidi@eecs.umich.edu#define sl_txmit 278 1157997Ssaidi@eecs.umich.edu#define sl_rcv 279 1167997Ssaidi@eecs.umich.edu#define alt_mode 524 1177997Ssaidi@eecs.umich.edu#define cc 525 1187997Ssaidi@eecs.umich.edu#define cc_ctl 526 1197997Ssaidi@eecs.umich.edu#define dc_flush 528 1207997Ssaidi@eecs.umich.edu#define dcperr_stat 530 1217997Ssaidi@eecs.umich.edu#define dc_test_ctl 531 1227997Ssaidi@eecs.umich.edu#define dc_test_tag 532 1237997Ssaidi@eecs.umich.edu#define dc_test_tag_temp 533 1247997Ssaidi@eecs.umich.edu#define dtb_asn 512 1257997Ssaidi@eecs.umich.edu#define dtb_cm 513 1267997Ssaidi@eecs.umich.edu#define dtb_ia 522 1277997Ssaidi@eecs.umich.edu#define dtb_iap 521 1287997Ssaidi@eecs.umich.edu#define dtb_is 523 1297997Ssaidi@eecs.umich.edu#define dtb_pte 515 1307997Ssaidi@eecs.umich.edu#define dtb_pte_temp 516 1317997Ssaidi@eecs.umich.edu#define dtb_tag 514 1327997Ssaidi@eecs.umich.edu#define mcsr 527 1337997Ssaidi@eecs.umich.edu#define dc_mode 534 1347997Ssaidi@eecs.umich.edu#define maf_mode 535 1357997Ssaidi@eecs.umich.edu#define mm_stat 517 1367997Ssaidi@eecs.umich.edu#define mvptbr 520 1377997Ssaidi@eecs.umich.edu#define va 518 1387997Ssaidi@eecs.umich.edu#define va_form 519 1397997Ssaidi@eecs.umich.edu#define ev5_srm__ps 0 1407997Ssaidi@eecs.umich.edu#define ev5_srm__pc 0 1417997Ssaidi@eecs.umich.edu#define ev5_srm__asten 0 1427997Ssaidi@eecs.umich.edu#define ev5_srm__astsr 0 1437997Ssaidi@eecs.umich.edu#define ev5_srm__ipir 0 1447997Ssaidi@eecs.umich.edu#define ev5_srm__ipl 0 1457997Ssaidi@eecs.umich.edu#define ev5_srm__mces 0 1467997Ssaidi@eecs.umich.edu#define ev5_srm__pcbb 0 1477997Ssaidi@eecs.umich.edu#define ev5_srm__prbr 0 1487997Ssaidi@eecs.umich.edu#define ev5_srm__ptbr 0 1497997Ssaidi@eecs.umich.edu#define ev5_srm__scbb 0 1507997Ssaidi@eecs.umich.edu#define ev5_srm__sirr 0 1517997Ssaidi@eecs.umich.edu#define ev5_srm__sisr 0 1527997Ssaidi@eecs.umich.edu#define ev5_srm__tbchk 0 1537997Ssaidi@eecs.umich.edu#define ev5_srm__tb1a 0 1547997Ssaidi@eecs.umich.edu#define ev5_srm__tb1ap 0 1557997Ssaidi@eecs.umich.edu#define ev5_srm__tb1ad 0 1567997Ssaidi@eecs.umich.edu#define ev5_srm__tb1ai 0 1577997Ssaidi@eecs.umich.edu#define ev5_srm__tbis 0 1587997Ssaidi@eecs.umich.edu#define ev5_srm__ksp 0 1597997Ssaidi@eecs.umich.edu#define ev5_srm__esp 0 1607997Ssaidi@eecs.umich.edu#define ev5_srm__ssp 0 1617997Ssaidi@eecs.umich.edu#define ev5_srm__usp 0 1627997Ssaidi@eecs.umich.edu#define ev5_srm__vptb 0 1637997Ssaidi@eecs.umich.edu#define ev5_srm__whami 0 1647997Ssaidi@eecs.umich.edu#define ev5_srm__cc 0 1657997Ssaidi@eecs.umich.edu#define ev5_srm__unq 0 1667997Ssaidi@eecs.umich.edu// processor-specific iprs. 1677997Ssaidi@eecs.umich.edu#define ev5__sc_ctl 168 1687997Ssaidi@eecs.umich.edu#define ev5__sc_stat 232 1697997Ssaidi@eecs.umich.edu#define ev5__sc_addr 392 1707997Ssaidi@eecs.umich.edu#define ev5__bc_ctl 296 1717997Ssaidi@eecs.umich.edu#define ev5__bc_config 456 1727997Ssaidi@eecs.umich.edu#define bc_config_k_size_1mb 1 1737997Ssaidi@eecs.umich.edu#define bc_config_k_size_2mb 2 1747997Ssaidi@eecs.umich.edu#define bc_config_k_size_4mb 3 1757997Ssaidi@eecs.umich.edu#define bc_config_k_size_8mb 4 1767997Ssaidi@eecs.umich.edu#define bc_config_k_size_16mb 5 1777997Ssaidi@eecs.umich.edu#define bc_config_k_size_32mb 6 1787997Ssaidi@eecs.umich.edu#define bc_config_k_size_64mb 7 1797997Ssaidi@eecs.umich.edu#define ev5__ei_stat 360 1807997Ssaidi@eecs.umich.edu#define ev5__ei_addr 328 1817997Ssaidi@eecs.umich.edu#define ev5__fill_syn 104 1827997Ssaidi@eecs.umich.edu#define ev5__bc_tag_addr 264 1837997Ssaidi@eecs.umich.edu#define ev5__aster 266 1847997Ssaidi@eecs.umich.edu#define ev5__astrr 265 1857997Ssaidi@eecs.umich.edu#define ev5__exc_addr 267 1867997Ssaidi@eecs.umich.edu#define exc_addr_v_pa 2 1877997Ssaidi@eecs.umich.edu#define exc_addr_s_pa 62 1887997Ssaidi@eecs.umich.edu#define ev5__exc_sum 268 1897997Ssaidi@eecs.umich.edu#define ev5__exc_mask 269 1907997Ssaidi@eecs.umich.edu#define ev5__hwint_clr 277 1917997Ssaidi@eecs.umich.edu#define ev5__ic_flush_ctl 281 1927997Ssaidi@eecs.umich.edu#define ev5__icperr_stat 282 1937997Ssaidi@eecs.umich.edu#define ev5__ic_perr_stat 282 1947997Ssaidi@eecs.umich.edu#define ev5__ic_row_map 283 1957997Ssaidi@eecs.umich.edu#define ev5__icsr 280 1967997Ssaidi@eecs.umich.edu#define ev5__ifault_va_form 274 1977997Ssaidi@eecs.umich.edu#define ev5__ifault_va_form_nt 274 1987997Ssaidi@eecs.umich.edu#define ifault_va_form_nt_v_vptb 30 1997997Ssaidi@eecs.umich.edu#define ifault_va_form_nt_s_vptb 34 2007997Ssaidi@eecs.umich.edu#define ev5__intid 273 2017997Ssaidi@eecs.umich.edu#define ev5__ipl 272 2027997Ssaidi@eecs.umich.edu#define ev5__itb_is 263 2037997Ssaidi@eecs.umich.edu#define ev5__itb_asn 259 2047997Ssaidi@eecs.umich.edu#define ev5__itb_ia 261 2057997Ssaidi@eecs.umich.edu#define ev5__itb_iap 262 2067997Ssaidi@eecs.umich.edu#define ev5__itb_pte 258 2077997Ssaidi@eecs.umich.edu#define ev5__itb_pte_temp 260 2087997Ssaidi@eecs.umich.edu#define ev5__itb_tag 257 2097997Ssaidi@eecs.umich.edu#define ev5__ivptbr 275 2107997Ssaidi@eecs.umich.edu#define ivptbr_v_vptb 30 2117997Ssaidi@eecs.umich.edu#define ivptbr_s_vptb 34 2127997Ssaidi@eecs.umich.edu#define ev5__pal_base 270 2137997Ssaidi@eecs.umich.edu#define ev5__pmctr 284 2147997Ssaidi@eecs.umich.edu#define ev5__ps 271 2157997Ssaidi@eecs.umich.edu#define ev5__isr 256 2167997Ssaidi@eecs.umich.edu#define ev5__sirr 264 2177997Ssaidi@eecs.umich.edu#define ev5__sl_txmit 278 2187997Ssaidi@eecs.umich.edu#define ev5__sl_rcv 279 2197997Ssaidi@eecs.umich.edu#define ev5__alt_mode 524 2207997Ssaidi@eecs.umich.edu#define ev5__cc 525 2217997Ssaidi@eecs.umich.edu#define ev5__cc_ctl 526 2227997Ssaidi@eecs.umich.edu#define ev5__dc_flush 528 2237997Ssaidi@eecs.umich.edu#define ev5__dcperr_stat 530 2247997Ssaidi@eecs.umich.edu#define ev5__dc_test_ctl 531 2257997Ssaidi@eecs.umich.edu#define ev5__dc_test_tag 532 2267997Ssaidi@eecs.umich.edu#define ev5__dc_test_tag_temp 533 2277997Ssaidi@eecs.umich.edu#define ev5__dtb_asn 512 2287997Ssaidi@eecs.umich.edu#define ev5__dtb_cm 513 2297997Ssaidi@eecs.umich.edu#define ev5__dtb_ia 522 2307997Ssaidi@eecs.umich.edu#define ev5__dtb_iap 521 2317997Ssaidi@eecs.umich.edu#define ev5__dtb_is 523 2327997Ssaidi@eecs.umich.edu#define ev5__dtb_pte 515 2337997Ssaidi@eecs.umich.edu#define ev5__dtb_pte_temp 516 2347997Ssaidi@eecs.umich.edu#define ev5__dtb_tag 514 2357997Ssaidi@eecs.umich.edu#define ev5__mcsr 527 2367997Ssaidi@eecs.umich.edu#define ev5__dc_mode 534 2377997Ssaidi@eecs.umich.edu#define ev5__maf_mode 535 2387997Ssaidi@eecs.umich.edu#define ev5__mm_stat 517 2397997Ssaidi@eecs.umich.edu#define ev5__mvptbr 520 2407997Ssaidi@eecs.umich.edu#define ev5__va 518 2417997Ssaidi@eecs.umich.edu#define ev5__va_form 519 2427997Ssaidi@eecs.umich.edu#define ev5__va_form_nt 519 2437997Ssaidi@eecs.umich.edu#define va_form_nt_s_va 19 2447997Ssaidi@eecs.umich.edu#define va_form_nt_v_vptb 30 2457997Ssaidi@eecs.umich.edu#define va_form_nt_s_vptb 34 2467997Ssaidi@eecs.umich.edu#define ev5s_ev5_def 10 2477997Ssaidi@eecs.umich.edu#define ev5_def 0 2487997Ssaidi@eecs.umich.edu// cbox registers. 2497997Ssaidi@eecs.umich.edu#define sc_ctl_v_sc_fhit 0 2507997Ssaidi@eecs.umich.edu#define sc_ctl_v_sc_flush 1 2517997Ssaidi@eecs.umich.edu#define sc_ctl_s_sc_tag_stat 6 2527997Ssaidi@eecs.umich.edu#define sc_ctl_v_sc_tag_stat 2 2537997Ssaidi@eecs.umich.edu#define sc_ctl_s_sc_fb_dp 4 2547997Ssaidi@eecs.umich.edu#define sc_ctl_v_sc_fb_dp 8 2557997Ssaidi@eecs.umich.edu#define sc_ctl_v_sc_blk_size 12 2567997Ssaidi@eecs.umich.edu#define sc_ctl_s_sc_set_en 3 2577997Ssaidi@eecs.umich.edu#define sc_ctl_v_sc_set_en 13 2587997Ssaidi@eecs.umich.edu#define sc_ctl_s_sc_soft_repair 3 2597997Ssaidi@eecs.umich.edu#define sc_ctl_v_sc_soft_repair 16 2607997Ssaidi@eecs.umich.edu#define sc_stat_s_sc_tperr 3 2617997Ssaidi@eecs.umich.edu#define sc_stat_v_sc_tperr 0 2627997Ssaidi@eecs.umich.edu#define sc_stat_s_sc_dperr 8 2637997Ssaidi@eecs.umich.edu#define sc_stat_v_sc_dperr 3 2647997Ssaidi@eecs.umich.edu#define sc_stat_s_cbox_cmd 5 2657997Ssaidi@eecs.umich.edu#define sc_stat_v_cbox_cmd 11 2667997Ssaidi@eecs.umich.edu#define sc_stat_v_sc_scnd_err 16 2677997Ssaidi@eecs.umich.edu#define sc_addr_fhm_v_sc_tag_parity 4 2687997Ssaidi@eecs.umich.edu#define sc_addr_fhm_s_tag_stat_sb0 3 2697997Ssaidi@eecs.umich.edu#define sc_addr_fhm_v_tag_stat_sb0 5 2707997Ssaidi@eecs.umich.edu#define sc_addr_fhm_s_tag_stat_sb1 3 2717997Ssaidi@eecs.umich.edu#define sc_addr_fhm_v_tag_stat_sb1 8 2727997Ssaidi@eecs.umich.edu#define sc_addr_fhm_s_ow_mod0 2 2737997Ssaidi@eecs.umich.edu#define sc_addr_fhm_v_ow_mod0 11 2747997Ssaidi@eecs.umich.edu#define sc_addr_fhm_s_ow_mod1 2 2757997Ssaidi@eecs.umich.edu#define sc_addr_fhm_v_ow_mod1 13 2767997Ssaidi@eecs.umich.edu#define sc_addr_fhm_s_tag_lo 17 2777997Ssaidi@eecs.umich.edu#define sc_addr_fhm_v_tag_lo 15 2787997Ssaidi@eecs.umich.edu#define sc_addr_fhm_s_tag_hi 7 2797997Ssaidi@eecs.umich.edu#define sc_addr_fhm_v_tag_hi 32 2807997Ssaidi@eecs.umich.edu#define bc_ctl_v_bc_enabled 0 2817997Ssaidi@eecs.umich.edu#define bc_ctl_v_alloc_cyc 1 2827997Ssaidi@eecs.umich.edu#define bc_ctl_v_ei_opt_cmd 2 2837997Ssaidi@eecs.umich.edu#define bc_ctl_v_ei_opt_cmd_mb 3 2847997Ssaidi@eecs.umich.edu#define bc_ctl_v_corr_fill_dat 4 2857997Ssaidi@eecs.umich.edu#define bc_ctl_v_vtm_first 5 2867997Ssaidi@eecs.umich.edu#define bc_ctl_v_ei_ecc_or_parity 6 2877997Ssaidi@eecs.umich.edu#define bc_ctl_v_bc_fhit 7 2887997Ssaidi@eecs.umich.edu#define bc_ctl_s_bc_tag_stat 5 2897997Ssaidi@eecs.umich.edu#define bc_ctl_v_bc_tag_stat 8 2907997Ssaidi@eecs.umich.edu#define bc_ctl_s_bc_bad_dat 2 2917997Ssaidi@eecs.umich.edu#define bc_ctl_v_bc_bad_dat 13 2927997Ssaidi@eecs.umich.edu#define bc_ctl_v_ei_dis_err 15 2937997Ssaidi@eecs.umich.edu#define bc_ctl_v_tl_pipe_latch 16 2947997Ssaidi@eecs.umich.edu#define bc_ctl_s_bc_wave_pipe 2 2957997Ssaidi@eecs.umich.edu#define bc_ctl_v_bc_wave_pipe 17 2967997Ssaidi@eecs.umich.edu#define bc_ctl_s_pm_mux_sel 6 2977997Ssaidi@eecs.umich.edu#define bc_ctl_v_pm_mux_sel 19 2987997Ssaidi@eecs.umich.edu#define bc_ctl_v_dbg_mux_sel 25 2997997Ssaidi@eecs.umich.edu#define bc_ctl_v_dis_baf_byp 26 3007997Ssaidi@eecs.umich.edu#define bc_ctl_v_dis_sc_vic_buf 27 3017997Ssaidi@eecs.umich.edu#define bc_ctl_v_dis_sys_addr_par 28 3027997Ssaidi@eecs.umich.edu#define bc_ctl_v_read_dirty_cln_shr 29 3037997Ssaidi@eecs.umich.edu#define bc_ctl_v_write_read_bubble 30 3047997Ssaidi@eecs.umich.edu#define bc_ctl_v_bc_wave_pipe_2 31 3057997Ssaidi@eecs.umich.edu#define bc_ctl_v_auto_dack 32 3067997Ssaidi@eecs.umich.edu#define bc_ctl_v_dis_byte_word 33 3077997Ssaidi@eecs.umich.edu#define bc_ctl_v_stclk_delay 34 3087997Ssaidi@eecs.umich.edu#define bc_ctl_v_write_under_miss 35 3097997Ssaidi@eecs.umich.edu#define bc_config_s_bc_size 3 3107997Ssaidi@eecs.umich.edu#define bc_config_v_bc_size 0 3117997Ssaidi@eecs.umich.edu#define bc_config_s_bc_rd_spd 4 3127997Ssaidi@eecs.umich.edu#define bc_config_v_bc_rd_spd 4 3137997Ssaidi@eecs.umich.edu#define bc_config_s_bc_wr_spd 4 3147997Ssaidi@eecs.umich.edu#define bc_config_v_bc_wr_spd 8 3157997Ssaidi@eecs.umich.edu#define bc_config_s_bc_rd_wr_spc 3 3167997Ssaidi@eecs.umich.edu#define bc_config_v_bc_rd_wr_spc 12 3177997Ssaidi@eecs.umich.edu#define bc_config_s_fill_we_offset 3 3187997Ssaidi@eecs.umich.edu#define bc_config_v_fill_we_offset 16 3197997Ssaidi@eecs.umich.edu#define bc_config_s_bc_we_ctl 9 3207997Ssaidi@eecs.umich.edu#define bc_config_v_bc_we_ctl 20 3217997Ssaidi@eecs.umich.edu// cbox registers, continued 3227997Ssaidi@eecs.umich.edu#define ei_stat_s_sys_id 4 3237997Ssaidi@eecs.umich.edu#define ei_stat_v_sys_id 24 3247997Ssaidi@eecs.umich.edu#define ei_stat_v_bc_tperr 28 3257997Ssaidi@eecs.umich.edu#define ei_stat_v_bc_tc_perr 29 3267997Ssaidi@eecs.umich.edu#define ei_stat_v_ei_es 30 3277997Ssaidi@eecs.umich.edu#define ei_stat_v_cor_ecc_err 31 3287997Ssaidi@eecs.umich.edu#define ei_stat_v_unc_ecc_err 32 3297997Ssaidi@eecs.umich.edu#define ei_stat_v_ei_par_err 33 3307997Ssaidi@eecs.umich.edu#define ei_stat_v_fil_ird 34 3317997Ssaidi@eecs.umich.edu#define ei_stat_v_seo_hrd_err 35 3327997Ssaidi@eecs.umich.edu// 3337997Ssaidi@eecs.umich.edu#define bc_tag_addr_v_hit 12 3347997Ssaidi@eecs.umich.edu#define bc_tag_addr_v_tagctl_p 13 3357997Ssaidi@eecs.umich.edu#define bc_tag_addr_v_tagctl_d 14 3367997Ssaidi@eecs.umich.edu#define bc_tag_addr_v_tagctl_s 15 3377997Ssaidi@eecs.umich.edu#define bc_tag_addr_v_tagctl_v 16 3387997Ssaidi@eecs.umich.edu#define bc_tag_addr_v_tag_p 17 3397997Ssaidi@eecs.umich.edu#define bc_tag_addr_s_bc_tag 19 3407997Ssaidi@eecs.umich.edu#define bc_tag_addr_v_bc_tag 20 3417997Ssaidi@eecs.umich.edu// ibox and icache registers. 3427997Ssaidi@eecs.umich.edu#define aster_v_kar 0 3437997Ssaidi@eecs.umich.edu#define aster_v_ear 1 3447997Ssaidi@eecs.umich.edu#define aster_v_sar 2 3457997Ssaidi@eecs.umich.edu#define aster_v_uar 3 3467997Ssaidi@eecs.umich.edu#define astrr_v_kar 0 3477997Ssaidi@eecs.umich.edu#define astrr_v_ear 1 3487997Ssaidi@eecs.umich.edu#define astrr_v_sar 2 3497997Ssaidi@eecs.umich.edu#define astrr_v_uar 3 3507997Ssaidi@eecs.umich.edu#define exc_addr_v_pal 0 3517997Ssaidi@eecs.umich.edu#define exc_sum_v_swc 10 3527997Ssaidi@eecs.umich.edu#define exc_sum_v_inv 11 3537997Ssaidi@eecs.umich.edu#define exc_sum_v_dze 12 3547997Ssaidi@eecs.umich.edu#define exc_sum_v_fov 13 3557997Ssaidi@eecs.umich.edu#define exc_sum_v_unf 14 3567997Ssaidi@eecs.umich.edu#define exc_sum_v_ine 15 3577997Ssaidi@eecs.umich.edu#define exc_sum_v_iov 16 3587997Ssaidi@eecs.umich.edu#define hwint_clr_v_pc0c 27 3597997Ssaidi@eecs.umich.edu#define hwint_clr_v_pc1c 28 3607997Ssaidi@eecs.umich.edu#define hwint_clr_v_pc2c 29 3617997Ssaidi@eecs.umich.edu#define hwint_clr_v_crdc 32 3627997Ssaidi@eecs.umich.edu#define hwint_clr_v_slc 33 3637997Ssaidi@eecs.umich.edu// ibox and icache registers, continued 3647997Ssaidi@eecs.umich.edu#define icperr_stat_v_dpe 11 3657997Ssaidi@eecs.umich.edu#define icperr_stat_v_tpe 12 3667997Ssaidi@eecs.umich.edu#define icperr_stat_v_tmr 13 3677997Ssaidi@eecs.umich.edu#define ic_perr_stat_v_dpe 11 3687997Ssaidi@eecs.umich.edu#define ic_perr_stat_v_tpe 12 3697997Ssaidi@eecs.umich.edu#define ic_perr_stat_v_tmr 13 3707997Ssaidi@eecs.umich.edu#define icsr_v_pma 8 3717997Ssaidi@eecs.umich.edu#define icsr_v_pmp 9 3727997Ssaidi@eecs.umich.edu#define icsr_v_byt 17 3737997Ssaidi@eecs.umich.edu#define icsr_v_fmp 18 3747997Ssaidi@eecs.umich.edu#define icsr_v_im0 20 3757997Ssaidi@eecs.umich.edu#define icsr_v_im1 21 3767997Ssaidi@eecs.umich.edu#define icsr_v_im2 22 3777997Ssaidi@eecs.umich.edu#define icsr_v_im3 23 3787997Ssaidi@eecs.umich.edu#define icsr_v_tmm 24 3797997Ssaidi@eecs.umich.edu#define icsr_v_tmd 25 3807997Ssaidi@eecs.umich.edu#define icsr_v_fpe 26 3817997Ssaidi@eecs.umich.edu#define icsr_v_hwe 27 3827997Ssaidi@eecs.umich.edu#define icsr_s_spe 2 3837997Ssaidi@eecs.umich.edu#define icsr_v_spe 28 3847997Ssaidi@eecs.umich.edu#define icsr_v_sde 30 3857997Ssaidi@eecs.umich.edu#define icsr_v_crde 32 3867997Ssaidi@eecs.umich.edu#define icsr_v_sle 33 3877997Ssaidi@eecs.umich.edu#define icsr_v_fms 34 3887997Ssaidi@eecs.umich.edu#define icsr_v_fbt 35 3897997Ssaidi@eecs.umich.edu#define icsr_v_fbd 36 3907997Ssaidi@eecs.umich.edu#define icsr_v_dbs 37 3917997Ssaidi@eecs.umich.edu#define icsr_v_ista 38 3927997Ssaidi@eecs.umich.edu#define icsr_v_tst 39 3937997Ssaidi@eecs.umich.edu#define ifault_va_form_s_va 30 3947997Ssaidi@eecs.umich.edu#define ifault_va_form_v_va 3 3957997Ssaidi@eecs.umich.edu#define ifault_va_form_s_vptb 31 3967997Ssaidi@eecs.umich.edu#define ifault_va_form_v_vptb 33 3977997Ssaidi@eecs.umich.edu#define ifault_va_form_nt_s_va 19 3987997Ssaidi@eecs.umich.edu#define ifault_va_form_nt_v_va 3 3997997Ssaidi@eecs.umich.edu#define intid_s_intid 5 4007997Ssaidi@eecs.umich.edu#define intid_v_intid 0 4017997Ssaidi@eecs.umich.edu// ibox and icache registers, continued 4027997Ssaidi@eecs.umich.edu#define ipl_s_ipl 5 4037997Ssaidi@eecs.umich.edu#define ipl_v_ipl 0 4047997Ssaidi@eecs.umich.edu#define itb_is_s_va 30 4057997Ssaidi@eecs.umich.edu#define itb_is_v_va 13 4067997Ssaidi@eecs.umich.edu#define itb_asn_s_asn 7 4077997Ssaidi@eecs.umich.edu#define itb_asn_v_asn 4 4087997Ssaidi@eecs.umich.edu#define itb_pte_v_asm 4 4097997Ssaidi@eecs.umich.edu#define itb_pte_s_gh 2 4107997Ssaidi@eecs.umich.edu#define itb_pte_v_gh 5 4117997Ssaidi@eecs.umich.edu#define itb_pte_v_kre 8 4127997Ssaidi@eecs.umich.edu#define itb_pte_v_ere 9 4137997Ssaidi@eecs.umich.edu#define itb_pte_v_sre 10 4147997Ssaidi@eecs.umich.edu#define itb_pte_v_ure 11 4157997Ssaidi@eecs.umich.edu#define itb_pte_s_pfn 27 4167997Ssaidi@eecs.umich.edu#define itb_pte_v_pfn 32 4177997Ssaidi@eecs.umich.edu#define itb_pte_temp_v_asm 13 4187997Ssaidi@eecs.umich.edu#define itb_pte_temp_v_kre 18 4197997Ssaidi@eecs.umich.edu#define itb_pte_temp_v_ere 19 4207997Ssaidi@eecs.umich.edu#define itb_pte_temp_v_sre 20 4217997Ssaidi@eecs.umich.edu#define itb_pte_temp_v_ure 21 4227997Ssaidi@eecs.umich.edu#define itb_pte_temp_s_gh 3 4237997Ssaidi@eecs.umich.edu#define itb_pte_temp_v_gh 29 4247997Ssaidi@eecs.umich.edu#define itb_pte_temp_s_pfn 27 4257997Ssaidi@eecs.umich.edu#define itb_pte_temp_v_pfn 32 4267997Ssaidi@eecs.umich.edu// ibox and icache registers, continued 4277997Ssaidi@eecs.umich.edu#define itb_tag_s_va 30 4287997Ssaidi@eecs.umich.edu#define itb_tag_v_va 13 4297997Ssaidi@eecs.umich.edu#define pal_base_s_pal_base 26 4307997Ssaidi@eecs.umich.edu#define pal_base_v_pal_base 14 4317997Ssaidi@eecs.umich.edu#define pmctr_s_sel2 4 4327997Ssaidi@eecs.umich.edu#define pmctr_v_sel2 0 4337997Ssaidi@eecs.umich.edu#define pmctr_s_sel1 4 4347997Ssaidi@eecs.umich.edu#define pmctr_v_sel1 4 4357997Ssaidi@eecs.umich.edu#define pmctr_v_killk 8 4367997Ssaidi@eecs.umich.edu#define pmctr_v_killp 9 4377997Ssaidi@eecs.umich.edu#define pmctr_s_ctl2 2 4387997Ssaidi@eecs.umich.edu#define pmctr_v_ctl2 10 4397997Ssaidi@eecs.umich.edu#define pmctr_s_ctl1 2 4407997Ssaidi@eecs.umich.edu#define pmctr_v_ctl1 12 4417997Ssaidi@eecs.umich.edu#define pmctr_s_ctl0 2 4427997Ssaidi@eecs.umich.edu#define pmctr_v_ctl0 14 4437997Ssaidi@eecs.umich.edu#define pmctr_s_ctr2 14 4447997Ssaidi@eecs.umich.edu#define pmctr_v_ctr2 16 4457997Ssaidi@eecs.umich.edu#define pmctr_v_killu 30 4467997Ssaidi@eecs.umich.edu#define pmctr_v_sel0 31 4477997Ssaidi@eecs.umich.edu#define pmctr_s_ctr1 16 4487997Ssaidi@eecs.umich.edu#define pmctr_v_ctr1 32 4497997Ssaidi@eecs.umich.edu#define pmctr_s_ctr0 16 4507997Ssaidi@eecs.umich.edu#define pmctr_v_ctr0 48 4517997Ssaidi@eecs.umich.edu#define ps_v_cm0 3 4527997Ssaidi@eecs.umich.edu#define ps_v_cm1 4 4537997Ssaidi@eecs.umich.edu#define isr_s_astrr 4 4547997Ssaidi@eecs.umich.edu#define isr_v_astrr 0 4557997Ssaidi@eecs.umich.edu#define isr_s_sisr 15 4567997Ssaidi@eecs.umich.edu#define isr_v_sisr 4 4577997Ssaidi@eecs.umich.edu#define isr_v_atr 19 4587997Ssaidi@eecs.umich.edu#define isr_v_i20 20 4597997Ssaidi@eecs.umich.edu#define isr_v_i21 21 4607997Ssaidi@eecs.umich.edu#define isr_v_i22 22 4617997Ssaidi@eecs.umich.edu#define isr_v_i23 23 4627997Ssaidi@eecs.umich.edu#define isr_v_pc0 27 4637997Ssaidi@eecs.umich.edu#define isr_v_pc1 28 4647997Ssaidi@eecs.umich.edu#define isr_v_pc2 29 4657997Ssaidi@eecs.umich.edu#define isr_v_pfl 30 4667997Ssaidi@eecs.umich.edu#define isr_v_mck 31 4677997Ssaidi@eecs.umich.edu#define isr_v_crd 32 4687997Ssaidi@eecs.umich.edu#define isr_v_sli 33 4697997Ssaidi@eecs.umich.edu#define isr_v_hlt 34 4707997Ssaidi@eecs.umich.edu#define sirr_s_sirr 15 4717997Ssaidi@eecs.umich.edu#define sirr_v_sirr 4 4727997Ssaidi@eecs.umich.edu// ibox and icache registers, continued 4737997Ssaidi@eecs.umich.edu#define sl_txmit_v_tmt 7 4747997Ssaidi@eecs.umich.edu#define sl_rcv_v_rcv 6 4757997Ssaidi@eecs.umich.edu// mbox and dcache registers. 4767997Ssaidi@eecs.umich.edu#define alt_mode_v_am0 3 4777997Ssaidi@eecs.umich.edu#define alt_mode_v_am1 4 4787997Ssaidi@eecs.umich.edu#define cc_ctl_v_cc_ena 32 4797997Ssaidi@eecs.umich.edu#define dcperr_stat_v_seo 0 4807997Ssaidi@eecs.umich.edu#define dcperr_stat_v_lock 1 4817997Ssaidi@eecs.umich.edu#define dcperr_stat_v_dp0 2 4827997Ssaidi@eecs.umich.edu#define dcperr_stat_v_dp1 3 4837997Ssaidi@eecs.umich.edu#define dcperr_stat_v_tp0 4 4847997Ssaidi@eecs.umich.edu#define dcperr_stat_v_tp1 5 4857997Ssaidi@eecs.umich.edu// the following two registers are used exclusively for test and diagnostics. 4867997Ssaidi@eecs.umich.edu// they should not be referenced in normal operation. 4877997Ssaidi@eecs.umich.edu#define dc_test_ctl_v_bank0 0 4887997Ssaidi@eecs.umich.edu#define dc_test_ctl_v_bank1 1 4897997Ssaidi@eecs.umich.edu#define dc_test_ctl_v_fill_0 2 4907997Ssaidi@eecs.umich.edu#define dc_test_ctl_s_index 10 4917997Ssaidi@eecs.umich.edu#define dc_test_ctl_v_index 3 4927997Ssaidi@eecs.umich.edu#define dc_test_ctl_s_fill_1 19 4937997Ssaidi@eecs.umich.edu#define dc_test_ctl_v_fill_1 13 4947997Ssaidi@eecs.umich.edu#define dc_test_ctl_s_fill_2 32 4957997Ssaidi@eecs.umich.edu#define dc_test_ctl_v_fill_2 32 4967997Ssaidi@eecs.umich.edu// mbox and dcache registers, continued. 4977997Ssaidi@eecs.umich.edu#define dc_test_tag_v_tag_par 2 4987997Ssaidi@eecs.umich.edu#define dc_test_tag_v_ow0 11 4997997Ssaidi@eecs.umich.edu#define dc_test_tag_v_ow1 12 5007997Ssaidi@eecs.umich.edu#define dc_test_tag_s_tag 26 5017997Ssaidi@eecs.umich.edu#define dc_test_tag_v_tag 13 5027997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_v_tag_par 2 5037997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_v_d0p0 3 5047997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_v_d0p1 4 5057997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_v_d1p0 5 5067997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_v_d1p1 6 5077997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_v_ow0 11 5087997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_v_ow1 12 5097997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_s_tag 26 5107997Ssaidi@eecs.umich.edu#define dc_test_tag_temp_v_tag 13 5117997Ssaidi@eecs.umich.edu#define dtb_asn_s_asn 7 5127997Ssaidi@eecs.umich.edu#define dtb_asn_v_asn 57 5137997Ssaidi@eecs.umich.edu#define dtb_cm_v_cm0 3 5147997Ssaidi@eecs.umich.edu#define dtb_cm_v_cm1 4 5157997Ssaidi@eecs.umich.edu#define dtbis_s_va0 30 5167997Ssaidi@eecs.umich.edu#define dtbis_v_va0 13 5177997Ssaidi@eecs.umich.edu#define dtb_pte_v_for 1 5187997Ssaidi@eecs.umich.edu#define dtb_pte_v_fow 2 5197997Ssaidi@eecs.umich.edu#define dtb_pte_v_asm 4 5207997Ssaidi@eecs.umich.edu#define dtb_pte_s_gh 2 5217997Ssaidi@eecs.umich.edu#define dtb_pte_v_gh 5 5227997Ssaidi@eecs.umich.edu#define dtb_pte_v_kre 8 5237997Ssaidi@eecs.umich.edu#define dtb_pte_v_ere 9 5247997Ssaidi@eecs.umich.edu#define dtb_pte_v_sre 10 5257997Ssaidi@eecs.umich.edu#define dtb_pte_v_ure 11 5267997Ssaidi@eecs.umich.edu#define dtb_pte_v_kwe 12 5277997Ssaidi@eecs.umich.edu#define dtb_pte_v_ewe 13 5287997Ssaidi@eecs.umich.edu#define dtb_pte_v_swe 14 5297997Ssaidi@eecs.umich.edu#define dtb_pte_v_uwe 15 5307997Ssaidi@eecs.umich.edu#define dtb_pte_s_pfn 27 5317997Ssaidi@eecs.umich.edu#define dtb_pte_v_pfn 32 5327997Ssaidi@eecs.umich.edu// mbox and dcache registers, continued. 5337997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_for 0 5347997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_fow 1 5357997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_kre 2 5367997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_ere 3 5377997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_sre 4 5387997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_ure 5 5397997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_kwe 6 5407997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_ewe 7 5417997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_swe 8 5427997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_uwe 9 5437997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_asm 10 5447997Ssaidi@eecs.umich.edu#define dtb_pte_temp_s_fill_0 2 5457997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_fill_0 11 5467997Ssaidi@eecs.umich.edu#define dtb_pte_temp_s_pfn 27 5477997Ssaidi@eecs.umich.edu#define dtb_pte_temp_v_pfn 13 5487997Ssaidi@eecs.umich.edu#define dtb_tag_s_va 30 5497997Ssaidi@eecs.umich.edu#define dtb_tag_v_va 13 5507997Ssaidi@eecs.umich.edu// most mcsr bits are used for testability and diagnostics only. 5517997Ssaidi@eecs.umich.edu// for normal operation, they will be supported in the following configuration: 5527997Ssaidi@eecs.umich.edu// split_dcache = 1, maf_nomerge = 0, wb_flush_always = 0, wb_nomerge = 0, 5537997Ssaidi@eecs.umich.edu// dc_ena<1:0> = 1, dc_fhit = 0, dc_bad_parity = 0 5547997Ssaidi@eecs.umich.edu#define mcsr_v_big_endian 0 5557997Ssaidi@eecs.umich.edu#define mcsr_v_sp0 1 5567997Ssaidi@eecs.umich.edu#define mcsr_v_sp1 2 5577997Ssaidi@eecs.umich.edu#define mcsr_v_mbox_sel 3 5587997Ssaidi@eecs.umich.edu#define mcsr_v_e_big_endian 4 5597997Ssaidi@eecs.umich.edu#define mcsr_v_dbg_packet_sel 5 5607997Ssaidi@eecs.umich.edu#define dc_mode_v_dc_ena 0 5617997Ssaidi@eecs.umich.edu#define dc_mode_v_dc_fhit 1 5627997Ssaidi@eecs.umich.edu#define dc_mode_v_dc_bad_parity 2 5637997Ssaidi@eecs.umich.edu#define dc_mode_v_dc_perr_dis 3 5647997Ssaidi@eecs.umich.edu#define dc_mode_v_dc_doa 4 5657997Ssaidi@eecs.umich.edu#define maf_mode_v_maf_nomerge 0 5667997Ssaidi@eecs.umich.edu#define maf_mode_v_wb_flush_always 1 5677997Ssaidi@eecs.umich.edu#define maf_mode_v_wb_nomerge 2 5687997Ssaidi@eecs.umich.edu#define maf_mode_v_io_nomerge 3 5697997Ssaidi@eecs.umich.edu#define maf_mode_v_wb_cnt_disable 4 5707997Ssaidi@eecs.umich.edu#define maf_mode_v_maf_arb_disable 5 5717997Ssaidi@eecs.umich.edu#define maf_mode_v_dread_pending 6 5727997Ssaidi@eecs.umich.edu#define maf_mode_v_wb_pending 7 5737997Ssaidi@eecs.umich.edu// mbox and dcache registers, continued. 5747997Ssaidi@eecs.umich.edu#define mm_stat_v_wr 0 5757997Ssaidi@eecs.umich.edu#define mm_stat_v_acv 1 5767997Ssaidi@eecs.umich.edu#define mm_stat_v_for 2 5777997Ssaidi@eecs.umich.edu#define mm_stat_v_fow 3 5787997Ssaidi@eecs.umich.edu#define mm_stat_v_dtb_miss 4 5797997Ssaidi@eecs.umich.edu#define mm_stat_v_bad_va 5 5807997Ssaidi@eecs.umich.edu#define mm_stat_s_ra 5 5817997Ssaidi@eecs.umich.edu#define mm_stat_v_ra 6 5827997Ssaidi@eecs.umich.edu#define mm_stat_s_opcode 6 5837997Ssaidi@eecs.umich.edu#define mm_stat_v_opcode 11 5847997Ssaidi@eecs.umich.edu#define mvptbr_s_vptb 31 5857997Ssaidi@eecs.umich.edu#define mvptbr_v_vptb 33 5867997Ssaidi@eecs.umich.edu#define va_form_s_va 30 5877997Ssaidi@eecs.umich.edu#define va_form_v_va 3 5887997Ssaidi@eecs.umich.edu#define va_form_s_vptb 31 5897997Ssaidi@eecs.umich.edu#define va_form_v_vptb 33 5907997Ssaidi@eecs.umich.edu#define va_form_nt_s_va 19 5917997Ssaidi@eecs.umich.edu#define va_form_nt_v_va 3 5927997Ssaidi@eecs.umich.edu//.endm 5937997Ssaidi@eecs.umich.edu 5947997Ssaidi@eecs.umich.edu#endif 595