paljtoslave.S revision 8008:257eb95aead3
1#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions 2#include "ev5_defs.h" 3#include "fromHudsonOsf.h" // OSF/1 specific definitions 4#include "fromHudsonMacros.h" // Global macro definitions 5#include "ev5_impure.h" // Scratch & logout area data structures 6#include "platform.h" // Platform specific definitions 7 8 9 .global palJToSlave 10 .text 3 11 12 /* 13 * args: 14 a0: here 15 a1: boot location 16 a2: CSERVE_J_KTOPAL 17 a3: restrart_pv 18 a4: vptb 19 a5: my_rpb 20 21 */ 22palJToSlave: 23 24 /* 25 * SRM Console Architecture III 3-26 26 */ 27 28 ALIGN_BRANCH 29 30 bis a3, zero, pv 31 bis zero, zero, t11 32 bis zero, zero, ra 33 34 /* Point the Vptbr to a2 */ 35 36 mtpr a4, mVptBr // Load Mbox copy 37 mtpr a4, iVptBr // Load Ibox copy 38 STALL // don't dual issue the load with mtpr -pb 39 40 /* Turn on superpage mapping in the mbox and icsr */ 41 lda t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP> 42 STALL // don't dual issue the load with mtpr -pb 43 mtpr t0, mcsr // Set the super page mode enable bit 44 STALL // don't dual issue the load with mtpr -pb 45 46 lda t0, 0(zero) 47 mtpr t0, dtbAsn 48 mtpr t0, itbAsn 49 50 LDLI (t1,0x20000000) 51 STALL // don't dual issue the load with mtpr -pb 52 mfpr t0, icsr // Enable superpage mapping 53 STALL // don't dual issue the load with mtpr -pb 54 bis t0, t1, t0 55 mtpr t0, icsr 56 57 STALL // Required stall to update chip ... 58 STALL 59 STALL 60 STALL 61 STALL 62 63 ldq_p s0, PCB_Q_PTBR(a5) 64 sll s0, VA_S_OFF, s0 // Shift PTBR into position 65 STALL // don't dual issue the load with mtpr -pb 66 mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1 67 STALL // don't dual issue the load with mtpr -pb 68 ldq_p sp, PCB_Q_KSP(a5) 69 70 //mtpr a0, excAddr // Load the dispatch address. 71 //STALL // don't dual issue the load with mtpr -pb 72 //bis a3, zero, a0 // first free PFN 73 // ldq_p a1, PCB_Q_PTBR(a5) // ptbr 74 75 //ldq_p a2, 24(zero) // argc 76 //ldq_p a3, 32(zero) // argv 77 //ldq_p a4, 40(zero) // environ 78 //lda a5, 0(zero) // osf_param 79 //STALL // don't dual issue the load with mtpr -pb 80 mtpr zero, dtbIa // Flush all D-stream TB entries 81 mtpr zero, itbIa // Flush all I-stream TB entries 82 83 84 mtpr a1, excAddr // Load the dispatch address. 85 86 STALL // don't dual issue the load with mtpr -pb 87 STALL // don't dual issue the load with mtpr -pb 88 mtpr zero, dtbIa // Flush all D-stream TB entries 89 mtpr zero, itbIa // Flush all I-stream TB entries 90 br zero, 2f 91 92 ALIGN_BLOCK 93 942: NOP 95 mtpr zero, icFlush // Flush the icache. 96 NOP 97 NOP 98 99 NOP // Required NOPs ... 1-10 100 NOP 101 NOP 102 NOP 103 NOP 104 NOP 105 NOP 106 NOP 107 NOP 108 NOP 109 110 NOP // Required NOPs ... 11-20 111 NOP 112 NOP 113 NOP 114 NOP 115 NOP 116 NOP 117 NOP 118 NOP 119 NOP 120 121 NOP // Required NOPs ... 21-30 122 NOP 123 NOP 124 NOP 125 NOP 126 NOP 127 NOP 128 NOP 129 NOP 130 NOP 131 132 NOP // Required NOPs ... 31-40 133 NOP 134 NOP 135 NOP 136 NOP 137 NOP 138 NOP 139 NOP 140 NOP 141 NOP 142 143 144 145 NOP // Required NOPs ... 41-44 146 NOP 147 NOP 148 NOP 149 150 hw_rei_stall // Dispatch to kernel 151 152