test_endian_conv.log revision 12855:588919e0e4aa 
1SystemC Simulation
2
3TLM-2 Endianness Conversion Helper Functions Tester
4March 2008
5January 2012 Updated to read from endian_conv/input.txt
6
70 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
8Pool status: 
9enter initiator memory state = (2048 characters)
10enter target memory state = (2048 characters)
11enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
12Initiator Intent
13  Cmd = R
14  Addr = 0
15  Len = 16
16  Bus Width = 8
17  Data Word = 4
18  Initiator offset = 0
19  Byte enables = x
20  Byte enable length = 0
21  Streaming width = 16
22  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
23  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
24  Converter = 0
25
26Converted Transaction
27  Addr = 0
28  Len = 16
29  Txn data pointer = changed
30  Byte enables and byte enable pointer = 1111111111111111, changed
31  Byte enable length = 16
32  Streaming width = 16
33
34Memory States after Transaction
35  initiator = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx
36  target = 0123456789abcdefghijklmnopqrstuvwxyz
37
381 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
39Pool status: 
40enter initiator memory state = (2048 characters)
41enter target memory state = (2048 characters)
42enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
43Initiator Intent
44  Cmd = R
45  Addr = 0
46  Len = 16
47  Bus Width = 8
48  Data Word = 4
49  Initiator offset = 0
50  Byte enables = x
51  Byte enable length = 0
52  Streaming width = 16
53  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
54  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
55  Converter = 1
56
57Converted Transaction
58  Addr = 0
59  Len = 16
60  Txn data pointer = changed
61  Byte enables and byte enable pointer = 1111111111111111, changed
62  Byte enable length = 16
63  Streaming width = 16
64
65Memory States after Transaction
66  initiator = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx
67  target = 0123456789abcdefghijklmnopqrstuvwxyz
68
692 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
70Pool status: 
71enter initiator memory state = (2048 characters)
72enter target memory state = (2048 characters)
73enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
74Initiator Intent
75  Cmd = R
76  Addr = 16
77  Len = 16
78  Bus Width = 8
79  Data Word = 4
80  Initiator offset = 0
81  Byte enables = x
82  Byte enable length = 0
83  Streaming width = 16
84  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
85  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
86  Converter = 2
87
88Converted Transaction
89  Addr = 16
90  Len = 16
91  Txn data pointer = changed
92  Byte enable length = 0
93  Streaming width = 16
94
95Memory States after Transaction
96  initiator = klmnghijstuvopqrxxxxxxxxxxxxxxxxxxxx
97  target = 0123456789abcdefghijklmnopqrstuvwxyz
98
993 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
100Pool status: 
101enter initiator memory state = (2048 characters)
102enter target memory state = (2048 characters)
103enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
104Initiator Intent
105  Cmd = W
106  Addr = 16
107  Len = 16
108  Bus Width = 8
109  Data Word = 4
110  Initiator offset = 4
111  Byte enables = x
112  Byte enable length = 0
113  Streaming width = 16
114  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
115  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
116  Converter = 0
117
118Converted Transaction
119  Addr = 16
120  Len = 16
121  Txn data pointer = changed
122  Byte enables and byte enable pointer = 1111111111111111, changed
123  Byte enable length = 16
124  Streaming width = 16
125
126Memory States after Transaction
127  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
128  target = xxxxxxxxxxxxxxxx89ab4567ghijcdefxxxx
129
1304 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
131Pool status: 
132Pool status: 
133Pool status: (16,16) 
134Pool status: (16,16) 
135enter initiator memory state = (2048 characters)
136enter target memory state = (2048 characters)
137enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
138Initiator Intent
139  Cmd = W
140  Addr = 16
141  Len = 16
142  Bus Width = 8
143  Data Word = 4
144  Initiator offset = 4
145  Byte enables = x
146  Byte enable length = 0
147  Streaming width = 16
148  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
149  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
150  Converter = 1
151
152Converted Transaction
153  Addr = 16
154  Len = 16
155  Txn data pointer = changed
156  Byte enables and byte enable pointer = 1111111111111111, changed
157  Byte enable length = 16
158  Streaming width = 16
159
160Memory States after Transaction
161  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
162  target = xxxxxxxxxxxxxxxx89ab4567ghijcdefxxxx
163
1645 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
165Pool status: 
166enter initiator memory state = (2048 characters)
167enter target memory state = (2048 characters)
168enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
169Initiator Intent
170  Cmd = W
171  Addr = 0
172  Len = 16
173  Bus Width = 8
174  Data Word = 4
175  Initiator offset = 0
176  Byte enables = x
177  Byte enable length = 0
178  Streaming width = 16
179  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
180  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
181  Converter = 2
182
183Converted Transaction
184  Addr = 0
185  Len = 16
186  Txn data pointer = changed
187  Byte enable length = 0
188  Streaming width = 16
189
190Memory States after Transaction
191  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
192  target = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx
193
1946 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
195Pool status: 
196enter initiator memory state = (2048 characters)
197enter target memory state = (2048 characters)
198enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
199Initiator Intent
200  Cmd = R
201  Addr = 0
202  Len = 16
203  Bus Width = 8
204  Data Word = 4
205  Initiator offset = 0
206  Byte enables = 1111000011110000
207  Byte enable length = 16
208  Streaming width = 16
209  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
210  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
211  Converter = 0
212
213Converted Transaction
214  Addr = 0
215  Len = 16
216  Txn data pointer = changed
217  Byte enables and byte enable pointer = 0000111100001111, changed
218  Byte enable length = 16
219  Streaming width = 16
220
221Memory States after Transaction
222  initiator = 4567xxxxcdefxxxxxxxxxxxxxxxxxxxxxxxx
223  target = 0123456789abcdefghijklmnopqrstuvwxyz
224
2250 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
226Pool status: 
227enter initiator memory state = (2048 characters)
228enter target memory state = (2048 characters)
229enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
230Initiator Intent
231  Cmd = R
232  Addr = 0
233  Len = 16
234  Bus Width = 8
235  Data Word = 4
236  Initiator offset = 0
237  Byte enables = 1111000011110000
238  Byte enable length = 16
239  Streaming width = 16
240  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
241  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
242  Converter = 1
243
244Converted Transaction
245  Addr = 0
246  Len = 16
247  Txn data pointer = changed
248  Byte enables and byte enable pointer = 0000111100001111, changed
249  Byte enable length = 16
250  Streaming width = 16
251
252Memory States after Transaction
253  initiator = 4567xxxxcdefxxxxxxxxxxxxxxxxxxxxxxxx
254  target = 0123456789abcdefghijklmnopqrstuvwxyz
255
2561 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
257Pool status: 
258enter initiator memory state = (2048 characters)
259enter target memory state = (2048 characters)
260enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
261Initiator Intent
262  Cmd = R
263  Addr = 16
264  Len = 16
265  Bus Width = 8
266  Data Word = 4
267  Initiator offset = 0
268  Byte enables = 1111000011110000
269  Byte enable length = 16
270  Streaming width = 16
271  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
272  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
273  Converter = 2
274
275Converted Transaction
276  Addr = 16
277  Len = 16
278  Txn data pointer = changed
279  Byte enables and byte enable pointer = 0000111100001111, changed
280  Byte enable length = 16
281  Streaming width = 16
282
283Memory States after Transaction
284  initiator = klmnxxxxstuvxxxxxxxxxxxxxxxxxxxxxxxx
285  target = 0123456789abcdefghijklmnopqrstuvwxyz
286
2872 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
288Pool status: 
289enter initiator memory state = (2048 characters)
290enter target memory state = (2048 characters)
291enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
292Initiator Intent
293  Cmd = W
294  Addr = 16
295  Len = 16
296  Bus Width = 8
297  Data Word = 4
298  Initiator offset = 4
299  Byte enables = 1111000000001111
300  Byte enable length = 16
301  Streaming width = 16
302  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
303  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
304  Converter = 0
305
306Converted Transaction
307  Addr = 16
308  Len = 16
309  Txn data pointer = changed
310  Byte enables and byte enable pointer = 0000111111110000, changed
311  Byte enable length = 16
312  Streaming width = 16
313
314Memory States after Transaction
315  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
316  target = xxxxxxxxxxxxxxxxxxxx4567ghijxxxxxxxx
317
3183 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
319Pool status: 
320enter initiator memory state = (2048 characters)
321enter target memory state = (2048 characters)
322enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
323Initiator Intent
324  Cmd = W
325  Addr = 16
326  Len = 16
327  Bus Width = 8
328  Data Word = 4
329  Initiator offset = 4
330  Byte enables = 1111000000001111
331  Byte enable length = 16
332  Streaming width = 16
333  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
334  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
335  Converter = 1
336
337Converted Transaction
338  Addr = 16
339  Len = 16
340  Txn data pointer = changed
341  Byte enables and byte enable pointer = 0000111111110000, changed
342  Byte enable length = 16
343  Streaming width = 16
344
345Memory States after Transaction
346  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
347  target = xxxxxxxxxxxxxxxxxxxx4567ghijxxxxxxxx
348
3494 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
350Pool status: 
351Pool status: (32,32) 
352Pool status: (32,32) (32,32) 
353Pool status: (32,32) (32,32) 
354enter initiator memory state = (2048 characters)
355enter target memory state = (2048 characters)
356enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
357Initiator Intent
358  Cmd = W
359  Addr = 0
360  Len = 16
361  Bus Width = 8
362  Data Word = 4
363  Initiator offset = 0
364  Byte enables = 1111000000001111
365  Byte enable length = 16
366  Streaming width = 16
367  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
368  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
369  Converter = 2
370
371Converted Transaction
372  Addr = 0
373  Len = 16
374  Txn data pointer = changed
375  Byte enables and byte enable pointer = 0000111111110000, changed
376  Byte enable length = 16
377  Streaming width = 16
378
379Memory States after Transaction
380  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
381  target = xxxx0123cdefxxxxxxxxxxxxxxxxxxxxxxxx
382
3835 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
384Pool status: (32,32) 
385enter initiator memory state = (2048 characters)
386enter target memory state = (2048 characters)
387enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
388Initiator Intent
389  Cmd = R
390  Addr = 20
391  Len = 4
392  Bus Width = 8
393  Data Word = 4
394  Initiator offset = 0
395  Byte enables = x
396  Byte enable length = 0
397  Streaming width = 4
398  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
399  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
400  Converter = 0
401
402Converted Transaction
403  Addr = 16
404  Len = 8
405  Txn data pointer = changed
406  Byte enables and byte enable pointer = 11110000, changed
407  Byte enable length = 8
408  Streaming width = 8
409
410Memory States after Transaction
411  initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
412  target = 0123456789abcdefghijklmnopqrstuvwxyz
413
4146 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
415Pool status: (32,32) 
416enter initiator memory state = (2048 characters)
417enter target memory state = (2048 characters)
418enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
419Initiator Intent
420  Cmd = R
421  Addr = 20
422  Len = 4
423  Bus Width = 8
424  Data Word = 4
425  Initiator offset = 0
426  Byte enables = x
427  Byte enable length = 0
428  Streaming width = 4
429  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
430  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
431  Converter = 1
432
433Converted Transaction
434  Addr = 16
435  Len = 4
436  Txn data pointer = changed
437  Byte enables and byte enable pointer = 1111, changed
438  Byte enable length = 4
439  Streaming width = 4
440
441Memory States after Transaction
442  initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
443  target = 0123456789abcdefghijklmnopqrstuvwxyz
444
4450 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
446Pool status: (32,32) 
447enter initiator memory state = (2048 characters)
448enter target memory state = (2048 characters)
449enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
450Initiator Intent
451  Cmd = R
452  Addr = 20
453  Len = 4
454  Bus Width = 8
455  Data Word = 4
456  Initiator offset = 0
457  Byte enables = x
458  Byte enable length = 0
459  Streaming width = 4
460  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
461  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
462  Converter = 3
463
464Converted Transaction
465  Addr = 16
466  Len = 4
467  Txn data pointer = unchanged
468  Byte enable length = 0
469  Streaming width = 4
470
471Memory States after Transaction
472  initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
473  target = 0123456789abcdefghijklmnopqrstuvwxyz
474
4751 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
476Pool status: (32,32) 
477enter initiator memory state = (2048 characters)
478enter target memory state = (2048 characters)
479enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
480Initiator Intent
481  Cmd = W
482  Addr = 28
483  Len = 4
484  Bus Width = 8
485  Data Word = 4
486  Initiator offset = 4
487  Byte enables = x
488  Byte enable length = 0
489  Streaming width = 4
490  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
491  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
492  Converter = 0
493
494Converted Transaction
495  Addr = 24
496  Len = 8
497  Txn data pointer = changed
498  Byte enables and byte enable pointer = 11110000, changed
499  Byte enable length = 8
500  Streaming width = 8
501
502Memory States after Transaction
503  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
504  target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx
505
5062 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
507Pool status: (32,32) 
508enter initiator memory state = (2048 characters)
509enter target memory state = (2048 characters)
510enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
511Initiator Intent
512  Cmd = W
513  Addr = 28
514  Len = 4
515  Bus Width = 8
516  Data Word = 4
517  Initiator offset = 4
518  Byte enables = x
519  Byte enable length = 0
520  Streaming width = 4
521  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
522  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
523  Converter = 1
524
525Converted Transaction
526  Addr = 24
527  Len = 4
528  Txn data pointer = changed
529  Byte enables and byte enable pointer = 1111, changed
530  Byte enable length = 4
531  Streaming width = 4
532
533Memory States after Transaction
534  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
535  target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx
536
5373 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
538Pool status: (32,32) 
539enter initiator memory state = (2048 characters)
540enter target memory state = (2048 characters)
541enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
542Initiator Intent
543  Cmd = W
544  Addr = 28
545  Len = 4
546  Bus Width = 8
547  Data Word = 4
548  Initiator offset = 4
549  Byte enables = x
550  Byte enable length = 0
551  Streaming width = 4
552  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
553  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
554  Converter = 3
555
556Converted Transaction
557  Addr = 24
558  Len = 4
559  Txn data pointer = unchanged
560  Byte enable length = 0
561  Streaming width = 4
562
563Memory States after Transaction
564  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
565  target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx
566
5674 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
568Pool status: 
569Pool status: (32,32) 
570Pool status: (32,32) (32,32) 
571Pool status: (32,32) (32,32) 
572enter initiator memory state = (2048 characters)
573enter target memory state = (2048 characters)
574enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
575Initiator Intent
576  Cmd = R
577  Addr = 21
578  Len = 2
579  Bus Width = 8
580  Data Word = 2
581  Initiator offset = 0
582  Byte enables = 11
583  Byte enable length = 2
584  Streaming width = 2
585  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
586  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
587  Converter = 0
588
589Converted Transaction
590  Addr = 16
591  Len = 8
592  Txn data pointer = changed
593  Byte enables and byte enable pointer = 01100000, changed
594  Byte enable length = 8
595  Streaming width = 8
596
597Memory States after Transaction
598  initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
599  target = 0123456789abcdefghijklmnopqrstuvwxyz
600
6015 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
602Pool status: (32,32) 
603enter initiator memory state = (2048 characters)
604enter target memory state = (2048 characters)
605enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
606Initiator Intent
607  Cmd = R
608  Addr = 21
609  Len = 2
610  Bus Width = 8
611  Data Word = 2
612  Initiator offset = 0
613  Byte enables = 11
614  Byte enable length = 2
615  Streaming width = 2
616  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
617  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
618  Converter = 1
619
620Converted Transaction
621  Addr = 16
622  Len = 3
623  Txn data pointer = changed
624  Byte enables and byte enable pointer = 011, changed
625  Byte enable length = 3
626  Streaming width = 3
627
628Memory States after Transaction
629  initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
630  target = 0123456789abcdefghijklmnopqrstuvwxyz
631
6326 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
633Pool status: (32,32) 
634enter initiator memory state = (2048 characters)
635enter target memory state = (2048 characters)
636enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
637Initiator Intent
638  Cmd = R
639  Addr = 21
640  Len = 2
641  Bus Width = 8
642  Data Word = 2
643  Initiator offset = 0
644  Byte enables = 11
645  Byte enable length = 2
646  Streaming width = 2
647  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
648  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
649  Converter = 3
650
651Converted Transaction
652  Addr = 17
653  Len = 2
654  Txn data pointer = unchanged
655  Byte enables and byte enable pointer = 11, unchanged
656  Byte enable length = 2
657  Streaming width = 2
658
659Memory States after Transaction
660  initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
661  target = 0123456789abcdefghijklmnopqrstuvwxyz
662
6630 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
664Pool status: (32,32) 
665enter initiator memory state = (2048 characters)
666enter target memory state = (2048 characters)
667enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
668Initiator Intent
669  Cmd = W
670  Addr = 0
671  Len = 4
672  Bus Width = 4
673  Data Word = 4
674  Initiator offset = 25
675  Byte enables = 1111
676  Byte enable length = 4
677  Streaming width = 4
678  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
679  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
680  Converter = 0
681
682Converted Transaction
683  Addr = 0
684  Len = 4
685  Txn data pointer = changed
686  Byte enables and byte enable pointer = 1111, changed
687  Byte enable length = 4
688  Streaming width = 4
689
690Memory States after Transaction
691  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
692  target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
693
6941 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
695Pool status: (32,32) 
696enter initiator memory state = (2048 characters)
697enter target memory state = (2048 characters)
698enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
699Initiator Intent
700  Cmd = W
701  Addr = 0
702  Len = 4
703  Bus Width = 4
704  Data Word = 4
705  Initiator offset = 25
706  Byte enables = 1111
707  Byte enable length = 4
708  Streaming width = 4
709  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
710  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
711  Converter = 1
712
713Converted Transaction
714  Addr = 0
715  Len = 4
716  Txn data pointer = changed
717  Byte enables and byte enable pointer = 1111, changed
718  Byte enable length = 4
719  Streaming width = 4
720
721Memory States after Transaction
722  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
723  target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
724
7252 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
726Pool status: (32,32) 
727enter initiator memory state = (2048 characters)
728enter target memory state = (2048 characters)
729enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
730Initiator Intent
731  Cmd = W
732  Addr = 0
733  Len = 4
734  Bus Width = 4
735  Data Word = 4
736  Initiator offset = 25
737  Byte enables = 1111
738  Byte enable length = 4
739  Streaming width = 4
740  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
741  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
742  Converter = 3
743
744Converted Transaction
745  Addr = 0
746  Len = 4
747  Txn data pointer = unchanged
748  Byte enables and byte enable pointer = 1111, unchanged
749  Byte enable length = 4
750  Streaming width = 4
751
752Memory States after Transaction
753  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
754  target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
755
7563 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
757Pool status: (32,32) 
758enter initiator memory state = (2048 characters)
759enter target memory state = (2048 characters)
760enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
761Initiator Intent
762  Cmd = R
763  Addr = 13
764  Len = 14
765  Bus Width = 8
766  Data Word = 2
767  Initiator offset = 0
768  Byte enables = x
769  Byte enable length = 0
770  Streaming width = 14
771  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
772  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
773  Converter = 0
774
775Converted Transaction
776  Addr = 8
777  Len = 24
778  Txn data pointer = changed
779  Byte enables and byte enable pointer = 111000001111111100000111, changed
780  Byte enable length = 24
781  Streaming width = 24
782
783Memory States after Transaction
784  initiator = 9an8lmjkhivgtuxxxxxxxxxxxxxxxxxxxxxx
785  target = 0123456789abcdefghijklmnopqrstuvwxyz
786
7874 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
788Pool status: 
789Pool status: (32,32) 
790Pool status: (32,32) (32,32) 
791Pool status: (32,32) (32,32) 
792enter initiator memory state = (2048 characters)
793enter target memory state = (2048 characters)
794enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
795Initiator Intent
796  Cmd = W
797  Addr = 5
798  Len = 4
799  Bus Width = 4
800  Data Word = 1
801  Initiator offset = 25
802  Byte enables = x
803  Byte enable length = 0
804  Streaming width = 4
805  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
806  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
807  Converter = 0
808
809Converted Transaction
810  Addr = 4
811  Len = 8
812  Txn data pointer = changed
813  Byte enables and byte enable pointer = 11100001, changed
814  Byte enable length = 8
815  Streaming width = 8
816
817Memory States after Transaction
818  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
819  target = xxxxrqpxxxxsxxxxxxxxxxxxxxxxxxxxxxxx
820
8215 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
822Pool status: (32,32) 
823enter initiator memory state = (2048 characters)
824enter target memory state = (2048 characters)
825enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
826Initiator Intent
827  Cmd = R
828  Addr = 10
829  Len = 12
830  Bus Width = 4
831  Data Word = 4
832  Initiator offset = 0
833  Byte enables = 111100001111
834  Byte enable length = 12
835  Streaming width = 12
836  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
837  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
838  Converter = 0
839
840Converted Transaction
841  Addr = 8
842  Len = 16
843  Txn data pointer = changed
844  Byte enables and byte enable pointer = 1100001111000011, changed
845  Byte enable length = 16
846  Streaming width = 16
847
848Memory States after Transaction
849  initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx
850  target = 0123456789abcdefghijklmnopqrstuvwxyz
851
8526 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
853Pool status: (32,32) 
854enter initiator memory state = (2048 characters)
855enter target memory state = (2048 characters)
856enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
857Initiator Intent
858  Cmd = W
859  Addr = 15
860  Len = 8
861  Bus Width = 8
862  Data Word = 4
863  Initiator offset = 25
864  Byte enables = 00001111
865  Byte enable length = 8
866  Streaming width = 8
867  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
868  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
869  Converter = 0
870
871Converted Transaction
872  Addr = 8
873  Len = 16
874  Txn data pointer = changed
875  Byte enables and byte enable pointer = 0000000001111000, changed
876  Byte enable length = 16
877  Streaming width = 16
878
879Memory States after Transaction
880  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
881  target = xxxxxxxxxxxxxxxxxtuvwxxxxxxxxxxxxxxx
882
8830 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
884Pool status: (32,32) 
885enter initiator memory state = (2048 characters)
886enter target memory state = (2048 characters)
887enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
888Initiator Intent
889  Cmd = R
890  Addr = 13
891  Len = 14
892  Bus Width = 8
893  Data Word = 2
894  Initiator offset = 0
895  Byte enables = x
896  Byte enable length = 0
897  Streaming width = 14
898  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
899  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
900  Converter = 1
901
902Converted Transaction
903  Addr = 8
904  Len = 24
905  Txn data pointer = changed
906  Byte enables and byte enable pointer = 111000001111111100000111, changed
907  Byte enable length = 24
908  Streaming width = 24
909
910Memory States after Transaction
911  initiator = 9an8lmjkhivgtuxxxxxxxxxxxxxxxxxxxxxx
912  target = 0123456789abcdefghijklmnopqrstuvwxyz
913
9141 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
915Pool status: (32,32) 
916enter initiator memory state = (2048 characters)
917enter target memory state = (2048 characters)
918enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
919Initiator Intent
920  Cmd = W
921  Addr = 5
922  Len = 4
923  Bus Width = 4
924  Data Word = 1
925  Initiator offset = 25
926  Byte enables = x
927  Byte enable length = 0
928  Streaming width = 4
929  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
930  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
931  Converter = 1
932
933Converted Transaction
934  Addr = 4
935  Len = 8
936  Txn data pointer = changed
937  Byte enables and byte enable pointer = 11100001, changed
938  Byte enable length = 8
939  Streaming width = 8
940
941Memory States after Transaction
942  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
943  target = xxxxrqpxxxxsxxxxxxxxxxxxxxxxxxxxxxxx
944
9452 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
946Pool status: (32,32) 
947enter initiator memory state = (2048 characters)
948enter target memory state = (2048 characters)
949enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
950Initiator Intent
951  Cmd = R
952  Addr = 10
953  Len = 12
954  Bus Width = 4
955  Data Word = 4
956  Initiator offset = 0
957  Byte enables = 111100001111
958  Byte enable length = 12
959  Streaming width = 12
960  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
961  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
962  Converter = 1
963
964Converted Transaction
965  Addr = 8
966  Len = 16
967  Txn data pointer = changed
968  Byte enables and byte enable pointer = 1100001111000011, changed
969  Byte enable length = 16
970  Streaming width = 16
971
972Memory States after Transaction
973  initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx
974  target = 0123456789abcdefghijklmnopqrstuvwxyz
975
9763 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
977Pool status: (32,32) 
978enter initiator memory state = (2048 characters)
979enter target memory state = (2048 characters)
980enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
981Initiator Intent
982  Cmd = W
983  Addr = 15
984  Len = 8
985  Bus Width = 8
986  Data Word = 4
987  Initiator offset = 25
988  Byte enables = 00001111
989  Byte enable length = 8
990  Streaming width = 8
991  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
992  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
993  Converter = 1
994
995Converted Transaction
996  Addr = 8
997  Len = 16
998  Txn data pointer = changed
999  Byte enables and byte enable pointer = 0000000001111000, changed
1000  Byte enable length = 16
1001  Streaming width = 16
1002
1003Memory States after Transaction
1004  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
1005  target = xxxxxxxxxxxxxxxxxtuvwxxxxxxxxxxxxxxx
1006
10074 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
1008Pool status: 
1009Pool status: (32,32) 
1010Pool status: (32,32) (32,32) 
1011Pool status: (32,32) (32,32) 
1012enter initiator memory state = (2048 characters)
1013enter target memory state = (2048 characters)
1014enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
1015Initiator Intent
1016  Cmd = R
1017  Addr = 13
1018  Len = 14
1019  Bus Width = 8
1020  Data Word = 2
1021  Initiator offset = 0
1022  Byte enables = x
1023  Byte enable length = 0
1024  Streaming width = 2
1025  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1026  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
1027  Converter = 0
1028
1029Converted Transaction
1030  Addr = 8
1031  Len = 56
1032  Txn data pointer = changed
1033  Byte enables and byte enable pointer = 01100000011000000110000001100000011000000110000001100000, changed
1034  Byte enable length = 56
1035  Streaming width = 8
1036
1037Memory States after Transaction
1038  initiator = 9a9a9a9a9a9a9axxxxxxxxxxxxxxxxxxxxxx
1039  target = 0123456789abcdefghijklmnopqrstuvwxyz
1040
10415 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
1042Pool status: (32,32) 
1043enter initiator memory state = (2048 characters)
1044enter target memory state = (2048 characters)
1045enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
1046Initiator Intent
1047  Cmd = W
1048  Addr = 5
1049  Len = 4
1050  Bus Width = 4
1051  Data Word = 1
1052  Initiator offset = 25
1053  Byte enables = 1101
1054  Byte enable length = 4
1055  Streaming width = 2
1056  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
1057  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1058  Converter = 0
1059
1060Converted Transaction
1061  Addr = 4
1062  Len = 8
1063  Txn data pointer = changed
1064  Byte enables and byte enable pointer = 01100100, changed
1065  Byte enable length = 8
1066  Streaming width = 4
1067
1068Memory States after Transaction
1069  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
1070  target = xxxxxspxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1071
10726 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
1073Pool status: (32,32) 
1074enter initiator memory state = (2048 characters)
1075enter target memory state = (2048 characters)
1076enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
1077Initiator Intent
1078  Cmd = R
1079  Addr = 10
1080  Len = 12
1081  Bus Width = 4
1082  Data Word = 4
1083  Initiator offset = 0
1084  Byte enables = 11110000
1085  Byte enable length = 8
1086  Streaming width = 12
1087  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1088  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
1089  Converter = 0
1090
1091Converted Transaction
1092  Addr = 8
1093  Len = 16
1094  Txn data pointer = changed
1095  Byte enables and byte enable pointer = 1100001111000011, changed
1096  Byte enable length = 16
1097  Streaming width = 16
1098
1099Memory States after Transaction
1100  initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx
1101  target = 0123456789abcdefghijklmnopqrstuvwxyz
1102
11030 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
1104Pool status: (32,32) 
1105enter initiator memory state = (2048 characters)
1106enter target memory state = (2048 characters)
1107enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
1108Initiator Intent
1109  Cmd = W
1110  Addr = 15
1111  Len = 16
1112  Bus Width = 8
1113  Data Word = 4
1114  Initiator offset = 25
1115  Byte enables = 00001111
1116  Byte enable length = 8
1117  Streaming width = 30
1118  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz
1119  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1120  Converter = 0
1121
1122Converted Transaction
1123  Addr = 8
1124  Len = 24
1125  Txn data pointer = changed
1126  Byte enables and byte enable pointer = 000000000111100001111000, changed
1127  Byte enable length = 24
1128  Streaming width = 24
1129
1130Memory States after Transaction
1131  initiator = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz
1132  target = xxxxxxxxxxxxxxxxxtuvwxxxx1234xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1133
11341 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
1135Pool status: (32,32) 
1136enter initiator memory state = (2048 characters)
1137enter target memory state = (2048 characters)
1138enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
1139Initiator Intent
1140  Cmd = R
1141  Addr = 10
1142  Len = 12
1143  Bus Width = 4
1144  Data Word = 4
1145  Initiator offset = 0
1146  Byte enables = 11110000
1147  Byte enable length = 8
1148  Streaming width = 15
1149  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1150  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
1151  Converter = 0
1152
1153Converted Transaction
1154  Addr = 8
1155  Len = 16
1156  Txn data pointer = changed
1157  Byte enables and byte enable pointer = 1100001111000011, changed
1158  Byte enable length = 16
1159  Streaming width = 16
1160
1161Memory States after Transaction
1162  initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx
1163  target = 0123456789abcdefghijklmnopqrstuvwxyz
1164
11652 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
1166Pool status: (32,32) 
1167enter initiator memory state = (2048 characters)
1168enter target memory state = (2048 characters)
1169enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
1170Initiator Intent
1171  Cmd = W
1172  Addr = 15
1173  Len = 16
1174  Bus Width = 8
1175  Data Word = 4
1176  Initiator offset = 25
1177  Byte enables = 00001111
1178  Byte enable length = 8
1179  Streaming width = 16
1180  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz
1181  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1182  Converter = 0
1183
1184Converted Transaction
1185  Addr = 8
1186  Len = 24
1187  Txn data pointer = changed
1188  Byte enables and byte enable pointer = 000000000111100001111000, changed
1189  Byte enable length = 24
1190  Streaming width = 24
1191
1192Memory States after Transaction
1193  initiator = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz
1194  target = xxxxxxxxxxxxxxxxxtuvwxxxx1234xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
1195
11963 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
1197Pool status: (32,32) 
1198Pool status: (32,32) (32,32) 
1199Pool status: (32,32) (32,32) (32,32) 
1200Pool status: (24,24) (32,32) (32,32) (32,32) 
1201Pool status: (24,24) (32,32) (32,32) (32,32) 
1202Pool status: (56,56) (24,24) (32,32) (32,32) (32,32) 
1203Pool status: (18,18) (56,56) (24,24) (32,32) (32,32) (32,32) 
1204Pool status: (20,20) (18,18) (56,56) (24,24) (32,32) (32,32) (32,32) 
1205