test11.cpp revision 12855:588919e0e4aa
1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 test11.cpp -- 23 24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 25 26 *****************************************************************************/ 27 28/***************************************************************************** 29 30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 31 changes you are making here. 32 33 Name, Affiliation, Date: 34 Description of Modification: 35 36 *****************************************************************************/ 37 38#include "systemc.h" 39 40SC_MODULE( proc1 ) 41{ 42 SC_HAS_PROCESS( proc1 ); 43 44 sc_in<bool> clk; 45 46 bool obj1; 47 sc_logic obj2; 48 sc_bv<4> obj3; 49 sc_lv<4> obj4; 50 51 proc1( sc_module_name NAME, 52 sc_signal<bool>& CLK ) 53 { 54 clk(CLK); 55 SC_THREAD( entry ); 56 sensitive << clk; 57 obj1 = 0; 58 obj2 = 0; 59 obj3 = "0000"; 60 obj4 = "0000"; 61 } 62 63 void entry(); 64}; 65 66void proc1::entry() 67{ 68 sc_bv<4> bv; 69 sc_lv<4> sv; 70 int i = 0; 71 bv = 0; 72 sv = 0; 73 wait(); 74 while(true) { 75 bv[i] = bv[i] ^ 1; 76 sv[i] ^= SC_LOGIC_1; 77 i = (i + 1) % 4; 78 obj3 = bv; 79 obj4 = sv; 80 wait(); 81 } 82} 83 84 85int sc_main(int ac, char *av[]) 86{ 87 sc_trace_file *tf; 88 sc_signal<bool> clock; 89 90 proc1 P1("P1", clock); 91 92 tf = sc_create_wif_trace_file("test11"); 93 tf->set_time_unit(1, SC_PS); 94 sc_trace(tf, P1.obj1, "Bool"); 95 sc_trace(tf, P1.obj2, "SC_Logic"); 96 sc_trace(tf, P1.obj3, "SC_BV"); 97 sc_trace(tf, P1.obj4, "SC_LV"); 98 sc_trace(tf, clock, "Clock"); 99 100 clock.write(0); 101 sc_start(0, SC_NS); 102 for (int i = 0; i< 10; i++) { 103 clock.write(1); 104 sc_start(10, SC_NS); 105 clock.write(0); 106 sc_start(10, SC_NS); 107 } 108 sc_close_wif_trace_file( tf ); 109 return 0; 110} 111