test14.vcd revision 12855:588919e0e4aa
1 2$timescale 3 1 ps 4$end 5 6$scope module SystemC $end 7$var wire 1 aaaaa clk $end 8$scope module mod $end 9$var wire 37 aaaab a [36:0] $end 10$var wire 1 aaaac port_1 $end 11$upscope $end 12$upscope $end 13$enddefinitions $end 14 15$comment 16All initial values are dumped below at time 0 sec = 0 timescale units. 17$end 18 19$dumpvars 201aaaaa 21b0 aaaab 220aaaac 23$end 24 25#25000 260aaaaa 27 28#50000 291aaaaa 30b1100 aaaab 311aaaac 32 33#75000 340aaaaa 35 36