test3.cpp revision 12855:588919e0e4aa
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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10    http://www.apache.org/licenses/LICENSE-2.0
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12  Unless required by applicable law or agreed to in writing, software
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15  implied.  See the License for the specific language governing
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19
20/*****************************************************************************
21
22  test3.cpp --
23
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32
33      Name, Affiliation, Date:
34  Description of Modification:
35
36 *****************************************************************************/
37
38/*
39  Corner case testing for new scheduler.
40  Case 3: Checking sensitive_pos() and sensitive_neg() methods
41*/
42
43#include "systemc.h"
44
45SC_MODULE( asyncproc )
46{
47  SC_HAS_PROCESS( asyncproc );
48
49  sc_in<bool> clock;
50
51  asyncproc(sc_module_name NAME,
52	    sc_signal_in_if<bool>& CLOCK)
53  {
54    clock(CLOCK);
55    SC_THREAD( entry );
56    sensitive << clock.pos();
57  }
58
59  void entry()
60  {
61    wait();
62    while (true) {
63      if (clock.posedge()) {
64	cout << "AsyncProc: Posedge\n";
65      }
66      else {
67	cout << "AsyncProc: ERROR" << endl;
68      }
69      wait();
70    }
71  }
72};
73
74SC_MODULE( asyncblock )
75{
76  SC_HAS_PROCESS( asyncblock );
77
78  sc_in<bool> clock;
79
80  asyncblock(sc_module_name NAME,
81	     sc_signal_in_if<bool>& CLOCK)
82  {
83    clock(CLOCK);
84    SC_METHOD( entry );
85    sensitive << clock.neg();
86  }
87
88  void entry()
89  {
90    if (clock.posedge()) {
91      cout << "AsyncBlock: ERROR\n";
92    }
93    else {
94      cout << "AsyncBlock: Negedge" << endl;
95    }
96  }
97};
98
99
100int
101sc_main(int ac, char *av[])
102{
103  sc_clock clock("Clock", 20, SC_NS, 0.5);
104
105  asyncproc P2("P2", clock);
106  asyncblock P3("P3", clock);
107
108  sc_start(160, SC_NS);
109  return 0;
110
111}
112