test1.cpp revision 12855
16019Shines@cs.fsu.edu/***************************************************************************** 210850SGiacomo.Gabrielli@arm.com 37416SAli.Saidi@ARM.com Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 47416SAli.Saidi@ARM.com more contributor license agreements. See the NOTICE file distributed 57416SAli.Saidi@ARM.com with this work for additional information regarding copyright ownership. 67416SAli.Saidi@ARM.com Accellera licenses this file to you under the Apache License, Version 2.0 77416SAli.Saidi@ARM.com (the "License"); you may not use this file except in compliance with the 87416SAli.Saidi@ARM.com License. You may obtain a copy of the License at 97416SAli.Saidi@ARM.com 107416SAli.Saidi@ARM.com http://www.apache.org/licenses/LICENSE-2.0 117416SAli.Saidi@ARM.com 127416SAli.Saidi@ARM.com Unless required by applicable law or agreed to in writing, software 137416SAli.Saidi@ARM.com distributed under the License is distributed on an "AS IS" BASIS, 146019Shines@cs.fsu.edu WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 156019Shines@cs.fsu.edu implied. See the License for the specific language governing 166019Shines@cs.fsu.edu permissions and limitations under the License. 176019Shines@cs.fsu.edu 186019Shines@cs.fsu.edu *****************************************************************************/ 196019Shines@cs.fsu.edu 206019Shines@cs.fsu.edu/***************************************************************************** 216019Shines@cs.fsu.edu 226019Shines@cs.fsu.edu test1.cpp -- 236019Shines@cs.fsu.edu 246019Shines@cs.fsu.edu Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 256019Shines@cs.fsu.edu 266019Shines@cs.fsu.edu *****************************************************************************/ 276019Shines@cs.fsu.edu 286019Shines@cs.fsu.edu/***************************************************************************** 296019Shines@cs.fsu.edu 306019Shines@cs.fsu.edu MODIFICATION LOG - modifiers, enter your name, affiliation, date and 316019Shines@cs.fsu.edu changes you are making here. 326019Shines@cs.fsu.edu 336019Shines@cs.fsu.edu Name, Affiliation, Date: 346019Shines@cs.fsu.edu Description of Modification: 356019Shines@cs.fsu.edu 366019Shines@cs.fsu.edu *****************************************************************************/ 376019Shines@cs.fsu.edu 386019Shines@cs.fsu.edu/* 396019Shines@cs.fsu.edu Corner case testing for new scheduler. 406019Shines@cs.fsu.edu Case 1. Checking triggering of a sc_async/sc_aproc 417416SAli.Saidi@ARM.com vis-a-vis a synchronous process. 427416SAli.Saidi@ARM.com This test checks to ensure that a synch. and async. sensitive 436019Shines@cs.fsu.edu to a clock are triggered correctly. 446019Shines@cs.fsu.edu */ 456019Shines@cs.fsu.edu 466019Shines@cs.fsu.edu#include "systemc.h" 476019Shines@cs.fsu.edu 4813536Sandreas.sandberg@arm.comSC_MODULE( syncproc ) 496019Shines@cs.fsu.edu{ 506019Shines@cs.fsu.edu SC_HAS_PROCESS( syncproc ); 5113536Sandreas.sandberg@arm.com 5213536Sandreas.sandberg@arm.com sc_in<bool> clk; 5313536Sandreas.sandberg@arm.com 5413536Sandreas.sandberg@arm.com const sc_signal<int>& in1; 5513536Sandreas.sandberg@arm.com const sc_signal<int>& in2; 5613536Sandreas.sandberg@arm.com sc_signal<int>& out; 5713536Sandreas.sandberg@arm.com 5813536Sandreas.sandberg@arm.com syncproc(sc_module_name NAME, 5913536Sandreas.sandberg@arm.com sc_signal_in_if<bool>& CLK, 6013536Sandreas.sandberg@arm.com const sc_signal<int>& IN1, 6113536Sandreas.sandberg@arm.com const sc_signal<int>& IN2, 6213536Sandreas.sandberg@arm.com sc_signal<int>& OUT_) 6313536Sandreas.sandberg@arm.com : in1(IN1), in2(IN2), out(OUT_) 6413536Sandreas.sandberg@arm.com { 6513536Sandreas.sandberg@arm.com SC_CTHREAD( entry, clk.pos() ); 6613536Sandreas.sandberg@arm.com clk(CLK); 6713536Sandreas.sandberg@arm.com out = 0; 686019Shines@cs.fsu.edu } 696019Shines@cs.fsu.edu 706019Shines@cs.fsu.edu void entry() 7111382Sbrandon.potter@amd.com { 7211382Sbrandon.potter@amd.com int i = 100; 7311382Sbrandon.potter@amd.com while (true) { 7411382Sbrandon.potter@amd.com out = i; 7511382Sbrandon.potter@amd.com wait(); 7611382Sbrandon.potter@amd.com while (in1.read() != i) { 7711382Sbrandon.potter@amd.com cout << "Sync: Value written = " << i << " value1 read = " << in1.read() << " value2 read = " << in2.read() << endl; 7811382Sbrandon.potter@amd.com wait(); 7911382Sbrandon.potter@amd.com cout << "Waited one cycle\n" << endl; 8011382Sbrandon.potter@amd.com } 8111382Sbrandon.potter@amd.com i++; 8211382Sbrandon.potter@amd.com } 8311382Sbrandon.potter@amd.com } 8411382Sbrandon.potter@amd.com}; 8511382Sbrandon.potter@amd.com 8611382Sbrandon.potter@amd.comSC_MODULE( asyncproc ) 8711382Sbrandon.potter@amd.com{ 8811382Sbrandon.potter@amd.com SC_HAS_PROCESS( asyncproc ); 8911382Sbrandon.potter@amd.com 9011382Sbrandon.potter@amd.com const sc_signal<int>& in; 9111382Sbrandon.potter@amd.com sc_signal<int>& out; 9211382Sbrandon.potter@amd.com sc_in<bool> clock; 9311382Sbrandon.potter@amd.com 9411382Sbrandon.potter@amd.com asyncproc(sc_module_name NAME, 9511382Sbrandon.potter@amd.com const sc_signal<int>& IN_, 9611382Sbrandon.potter@amd.com sc_signal<int>& OUT_, 9711382Sbrandon.potter@amd.com sc_signal_in_if<bool>& CLOCK) 9811382Sbrandon.potter@amd.com : in(IN_), out(OUT_) 9911382Sbrandon.potter@amd.com { 10011382Sbrandon.potter@amd.com out = 0; 10111382Sbrandon.potter@amd.com clock(CLOCK); 10211382Sbrandon.potter@amd.com SC_THREAD( entry ); 10311382Sbrandon.potter@amd.com sensitive << clock.pos(); 10411382Sbrandon.potter@amd.com } 10511382Sbrandon.potter@amd.com 1066019Shines@cs.fsu.edu void entry() 1076019Shines@cs.fsu.edu { 10811381Sbrandon.potter@amd.com wait(); 1096019Shines@cs.fsu.edu while (true) { 1106019Shines@cs.fsu.edu if (clock.posedge()) { 1116019Shines@cs.fsu.edu out = in; 1126019Shines@cs.fsu.edu cout << "AsyncProc: Value read = " << in.read() << endl; 1136019Shines@cs.fsu.edu } 1147416SAli.Saidi@ARM.com else { 1157416SAli.Saidi@ARM.com cout << "Error" << endl; 1167416SAli.Saidi@ARM.com } 1177416SAli.Saidi@ARM.com wait(); 1187416SAli.Saidi@ARM.com } 1197416SAli.Saidi@ARM.com } 1207416SAli.Saidi@ARM.com}; 1217416SAli.Saidi@ARM.com 1226019Shines@cs.fsu.eduSC_MODULE( asyncblock ) 12311382Sbrandon.potter@amd.com{ 12411382Sbrandon.potter@amd.com SC_HAS_PROCESS( asyncblock ); 12511382Sbrandon.potter@amd.com 12611382Sbrandon.potter@amd.com const sc_signal<int>& in; 12711382Sbrandon.potter@amd.com sc_signal<int>& out; 12811382Sbrandon.potter@amd.com sc_in<bool> clock; 12911382Sbrandon.potter@amd.com 13011382Sbrandon.potter@amd.com asyncblock(sc_module_name NAME, 13111382Sbrandon.potter@amd.com const sc_signal<int>& IN_, 13211382Sbrandon.potter@amd.com sc_signal<int>& OUT_, 13311382Sbrandon.potter@amd.com sc_signal_in_if<bool>& CLOCK) 13411382Sbrandon.potter@amd.com : in(IN_), out(OUT_) 13511382Sbrandon.potter@amd.com { 13611382Sbrandon.potter@amd.com clock(CLOCK); 13711382Sbrandon.potter@amd.com out = 0; 13811382Sbrandon.potter@amd.com SC_METHOD( entry ); 13911382Sbrandon.potter@amd.com sensitive << clock; 14011382Sbrandon.potter@amd.com } 14111382Sbrandon.potter@amd.com 1426019Shines@cs.fsu.edu void entry() 1436019Shines@cs.fsu.edu { 14411383Sbrandon.potter@amd.com if (clock.posedge()) { 14511383Sbrandon.potter@amd.com out = in; 14611383Sbrandon.potter@amd.com cout << "AsyncBlock: Value read = " << in.read() << endl; 14711383Sbrandon.potter@amd.com } 14811383Sbrandon.potter@amd.com else { 14911383Sbrandon.potter@amd.com cout << "Seen other edge" << endl; 15011383Sbrandon.potter@amd.com } 15111383Sbrandon.potter@amd.com } 15211383Sbrandon.potter@amd.com}; 15311383Sbrandon.potter@amd.com 15411383Sbrandon.potter@amd.com 15511383Sbrandon.potter@amd.comint 15611383Sbrandon.potter@amd.comsc_main(int ac, char *av[]) 15711383Sbrandon.potter@amd.com{ 15811383Sbrandon.potter@amd.com sc_signal<int> a, b, c; 15911383Sbrandon.potter@amd.com 16011383Sbrandon.potter@amd.com sc_clock clock("Clock", 20, SC_NS, 0.5); 1616019Shines@cs.fsu.edu 1626019Shines@cs.fsu.edu syncproc P1("P1", clock, a, b, c); 1636019Shines@cs.fsu.edu asyncproc P2("P2", c, a, clock); 1646019Shines@cs.fsu.edu asyncblock P3("P3", c, b, clock); 1657416SAli.Saidi@ARM.com 1667416SAli.Saidi@ARM.com sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); 1677416SAli.Saidi@ARM.com tf->set_time_unit(1, SC_NS); 1687416SAli.Saidi@ARM.com sc_trace(tf, a, "SYNC-IN1"); 1697416SAli.Saidi@ARM.com sc_trace(tf, b, "SYNC-IN2"); 1707416SAli.Saidi@ARM.com sc_trace(tf, c, "SYNC2-OUT"); 1717416SAli.Saidi@ARM.com sc_trace(tf, clock, "Clock"); 1727416SAli.Saidi@ARM.com 1737416SAli.Saidi@ARM.com sc_start(160, SC_NS); 1747416SAli.Saidi@ARM.com return 0; 1757416SAli.Saidi@ARM.com 1767416SAli.Saidi@ARM.com} 17710850SGiacomo.Gabrielli@arm.com