main.cpp revision 12855:588919e0e4aa 
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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6  Accellera licenses this file to you under the Apache License, Version 2.0
7  (the "License"); you may not use this file except in compliance with the
8  License.  You may obtain a copy of the License at
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10    http://www.apache.org/licenses/LICENSE-2.0
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12  Unless required by applicable law or agreed to in writing, software
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20/*****************************************************************************
21
22  main.cpp --
23
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32
33      Name, Affiliation, Date:
34  Description of Modification:
35
36 *****************************************************************************/
37
38/* Main file for memory simulation */
39
40#include "accessor.h"
41#include "ram.h"
42
43int sc_main(int ac, char *av[])
44{
45  sc_signal<bool> cs("CS");
46  sc_signal<bool> we("WE");
47  signal_bool_vector10 addr("Address");
48  signal_bool_vector32 data1("Data1");
49  signal_bool_vector32 data2("Data2");
50  const int delay_cycles = 2;
51
52  sc_clock clk("Clock", 20, SC_NS, 0.5, 0.0, SC_NS);
53
54  accessor A("Accessor", clk, data1, cs, we, addr, data2, delay_cycles);
55  ram R("Ram", clk, data2, cs, we, addr, data1, delay_cycles);
56
57  sc_start(1060, SC_NS);
58  return 0;
59}
60