main.cpp revision 12855:588919e0e4aa
1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 main.cpp -- 23 24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 25 26 *****************************************************************************/ 27 28/***************************************************************************** 29 30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 31 changes you are making here. 32 33 Name, Affiliation, Date: 34 Description of Modification: 35 36 *****************************************************************************/ 37 38 /***************************************/ 39 /* Main Filename: main.cc */ 40 /***************************************/ 41 42#include "array_range.h" 43#include "stimgen.h" 44 45int sc_main(int ac, char *av[]) 46{ 47 48// Signal Instantiation 49 signal_bool_vector8 in1 ("in1"); 50 signal_bool_vector4 o1 ("o1"); 51 signal_bool_vector4 o2 ("o2"); 52 signal_bool_vector8 o3 ("o3"); 53 signal_bool_vector8 o4 ("o4"); 54 signal_bool_vector8 o5 ("o5"); 55 56// Clock Instantiation 57 sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); 58 59// Process Instantiation 60 array_range D1 ("D1", clk, in1, o1, o2, o3, o4, o5); 61 62 stimgen T1 ("T1", clk, o1, o2, o3, o4, o5, in1); 63 64// Simulation Run Control 65 sc_start(); 66 return 0; 67} 68