timing.log revision 12855:588919e0e4aa 
1SystemC Simulation
2
3START OF SIM -- CLOCK AT NEGEDGE (10,30,50,...) 
410 ns :  ready[S] = 0 a[V] = 0
5			 a =    0 
610 ns :  ready[S] = 0 a[V] = 0
7      ready =    0 
810 ns :  ready[S] = 0 a[V] = 0
9
10CLK 
1130 ns :  ready[S] = 0 a[V] = 0
12		   a =    1 
1330 ns :  ready[S] = 0 a[V] = 1
14      ready =    1 
1530 ns :  ready[S] = 0 a[V] = 1
16
17CLK 
1850 ns :  ready[S] = 1 a[V] = 1
19		   a =    0 
2050 ns :  ready[S] = 1 a[V] = 0
21      ready =    0 
2250 ns :  ready[S] = 1 a[V] = 0
23
24CLK 
2570 ns :  ready[S] = 0 a[V] = 0
26		   a =    1 
2770 ns :  ready[S] = 0 a[V] = 1
28      ready =    1 
2970 ns :  ready[S] = 0 a[V] = 1
30
31CLK 
3290 ns :  ready[S] = 1 a[V] = 1
33Terminating process TB1.RD1.entry
34