tb.h revision 12855:588919e0e4aa
111986Sandreas.sandberg@arm.com/*****************************************************************************
211986Sandreas.sandberg@arm.com
311986Sandreas.sandberg@arm.com  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
411986Sandreas.sandberg@arm.com  more contributor license agreements.  See the NOTICE file distributed
511986Sandreas.sandberg@arm.com  with this work for additional information regarding copyright ownership.
611986Sandreas.sandberg@arm.com  Accellera licenses this file to you under the Apache License, Version 2.0
711986Sandreas.sandberg@arm.com  (the "License"); you may not use this file except in compliance with the
811986Sandreas.sandberg@arm.com  License.  You may obtain a copy of the License at
911986Sandreas.sandberg@arm.com
1011986Sandreas.sandberg@arm.com    http://www.apache.org/licenses/LICENSE-2.0
1111986Sandreas.sandberg@arm.com
1211986Sandreas.sandberg@arm.com  Unless required by applicable law or agreed to in writing, software
1311986Sandreas.sandberg@arm.com  distributed under the License is distributed on an "AS IS" BASIS,
1414299Sbbruce@ucdavis.edu  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
1514299Sbbruce@ucdavis.edu  implied.  See the License for the specific language governing
1614299Sbbruce@ucdavis.edu  permissions and limitations under the License.
1714299Sbbruce@ucdavis.edu
1814299Sbbruce@ucdavis.edu *****************************************************************************/
1911986Sandreas.sandberg@arm.com
2011986Sandreas.sandberg@arm.com/*****************************************************************************
2111986Sandreas.sandberg@arm.com
2211986Sandreas.sandberg@arm.com  tb.h --
2311986Sandreas.sandberg@arm.com
2411986Sandreas.sandberg@arm.com  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
2511986Sandreas.sandberg@arm.com
2611986Sandreas.sandberg@arm.com *****************************************************************************/
2711986Sandreas.sandberg@arm.com
2811986Sandreas.sandberg@arm.com/*****************************************************************************
2911986Sandreas.sandberg@arm.com
3011986Sandreas.sandberg@arm.com  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
3111986Sandreas.sandberg@arm.com  changes you are making here.
3211986Sandreas.sandberg@arm.com
3311986Sandreas.sandberg@arm.com      Name, Affiliation, Date:
3412391Sjason@lowepower.com  Description of Modification:
3512391Sjason@lowepower.com
3612391Sjason@lowepower.com *****************************************************************************/
3712391Sjason@lowepower.com
3812391Sjason@lowepower.com/* Common interface file for test bench
3911986Sandreas.sandberg@arm.com   Author: PRP
4012391Sjason@lowepower.com   */
4112391Sjason@lowepower.com
4212391Sjason@lowepower.comSC_MODULE( tb )
4312391Sjason@lowepower.com{
4412391Sjason@lowepower.com    SC_HAS_PROCESS( tb );
4511986Sandreas.sandberg@arm.com
4612391Sjason@lowepower.com    sc_in_clk clk;
4712391Sjason@lowepower.com
4812391Sjason@lowepower.com        // Output Reset Port
4912391Sjason@lowepower.com        sc_signal<bool>& reset_sig;
5012391Sjason@lowepower.com
5111986Sandreas.sandberg@arm.com        // Output Data Ports
5212391Sjason@lowepower.com	sc_signal<int>& i1;
5312391Sjason@lowepower.com	sc_signal<int>& i2;
5412391Sjason@lowepower.com	sc_signal<int>& i3;
5512391Sjason@lowepower.com	sc_signal<int>& i4;
5612391Sjason@lowepower.com	sc_signal<int>& i5;
5711986Sandreas.sandberg@arm.com
5812391Sjason@lowepower.com        // Output Control Ports
5912391Sjason@lowepower.com	sc_signal<bool>& cont1;
6012037Sandreas.sandberg@arm.com	sc_signal<bool>& cont2;
6112037Sandreas.sandberg@arm.com	sc_signal<bool>& cont3;
6212037Sandreas.sandberg@arm.com
6312037Sandreas.sandberg@arm.com        // Input Data Ports
6412391Sjason@lowepower.com	const sc_signal<int>& o1;
6512037Sandreas.sandberg@arm.com	const sc_signal<int>& o2;
6612037Sandreas.sandberg@arm.com	const sc_signal<int>& o3;
6712037Sandreas.sandberg@arm.com	const sc_signal<int>& o4;
6812037Sandreas.sandberg@arm.com	const sc_signal<int>& o5;
6911986Sandreas.sandberg@arm.com
7012391Sjason@lowepower.com	// Constructor
7112391Sjason@lowepower.com	tb (
7211986Sandreas.sandberg@arm.com        sc_module_name NAME,
7311986Sandreas.sandberg@arm.com	sc_clock& CLK,
7411986Sandreas.sandberg@arm.com
7511986Sandreas.sandberg@arm.com        sc_signal<bool>& RESET_SIG,
7611986Sandreas.sandberg@arm.com
7711986Sandreas.sandberg@arm.com	sc_signal<int>& I1,
7811986Sandreas.sandberg@arm.com	sc_signal<int>& I2,
7911986Sandreas.sandberg@arm.com	sc_signal<int>& I3,
8011986Sandreas.sandberg@arm.com	sc_signal<int>& I4,
8111986Sandreas.sandberg@arm.com	sc_signal<int>& I5,
8211986Sandreas.sandberg@arm.com
8311986Sandreas.sandberg@arm.com	sc_signal<bool>& CONT1,
8411986Sandreas.sandberg@arm.com	sc_signal<bool>& CONT2,
8511986Sandreas.sandberg@arm.com	sc_signal<bool>& CONT3,
8611986Sandreas.sandberg@arm.com
8712391Sjason@lowepower.com	const sc_signal<int>& O1,
8812391Sjason@lowepower.com	const sc_signal<int>& O2,
8912391Sjason@lowepower.com	const sc_signal<int>& O3,
9012391Sjason@lowepower.com	const sc_signal<int>& O4,
9112391Sjason@lowepower.com	const sc_signal<int>& O5)
9211986Sandreas.sandberg@arm.com	  : reset_sig(RESET_SIG), i1(I1),  i2(I2),
9311986Sandreas.sandberg@arm.com	    i3(I3),  i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2),
9412391Sjason@lowepower.com	    cont3 (CONT3), o1(O1),  o2(O2),  o3(O3),  o4(O4),  o5(O5)
9512391Sjason@lowepower.com        {
9612391Sjason@lowepower.com	  clk(CLK);
9712391Sjason@lowepower.com            SC_CTHREAD( entry, clk.pos() );
9811986Sandreas.sandberg@arm.com	}
9912391Sjason@lowepower.com
10012391Sjason@lowepower.com  void entry();
10112391Sjason@lowepower.com};
10212391Sjason@lowepower.com