io_controller.h revision 12855:588919e0e4aa 
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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10    http://www.apache.org/licenses/LICENSE-2.0
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20/*****************************************************************************
21
22  io_controller.h --
23
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
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33      Name, Affiliation, Date:
34  Description of Modification:
35
36 *****************************************************************************/
37
38/*############################################################################
39#  Siemens AG                        copyright 2000
40#                                    All Rights Reserved
41#
42#  File name : io_controller.h
43#
44#  Title     : I/O-Controller
45#
46#  Purpose   : definitions for I/O-Controller-module
47#
48#  Author    : Hannes Muhr
49#              PSE EZE MSA
50#
51##############################################################################
52#  Modification History :
53#
54#
55##############################################################################*/
56
57#ifndef IO_CONTROLLER_INC
58#define IO_CONTROLLER_INC
59
60#ifdef LOGGING
61#include <fstream>
62#endif
63#include "systemc.h"
64//#include "mii_if.h"
65//#include "mbdatm.h"
66
67// class semaphore {
68
69//    bool value;
70
71//    public:
72//       semaphore();
73//       void P();
74//       void V();
75//       bool get_value();
76// };
77
78//void sc_trace(sc_trace_file *, const semaphore&, const std::string&);
79
80#ifdef LOGGING
81/* stream for logging */
82extern ofstream flog;
83#endif
84
85#define MII_FIFO_SIZE 400
86#define SCAN_INTERVAL 200000   // 200 us
87#define NS *1e-9
88
89SC_MODULE(io_controller_m){
90
91   /* ports */
92   sc_in_clk clk_i486_if;
93
94   sc_out<sc_uint<30> > addr30_o;
95   sc_inout<sc_uint<32> > data32_i;
96   sc_out<sc_uint<32> > data32_o;
97   sc_out<bool> ads_n_o;
98   sc_out<bool> wr_n_o;
99   sc_in<bool> rdy_n_i;
100   sc_in<bool> ar_i;
101   sc_in<bool> res_n_i;
102
103   sc_out<sc_uint<4> > mii_data4_o;
104   sc_out<bool> mii_en_o;
105   sc_in<sc_uint<4> > mii_data4_i;
106   sc_in<bool> mii_en_i;
107   sc_in<bool> mii_coll_det;
108   sc_in_clk clk_mii;
109
110   /* signals */
111   sc_signal<sc_uint<32> > mux_data32;
112   sc_signal<sc_uint<32> > in_fifo_data32;
113   sc_signal<sc_uint<32> > out_fifo_data32;
114   sc_signal<sc_uint<32> > control_data32;
115   sc_signal<bool> out_fifo_en;
116   sc_signal<bool> out_fifo_act;
117   sc_signal<bool> in_fifo_en;
118   sc_signal<bool> control_en;
119   sc_signal<bool> out_fifo_reset;
120
121   /* variables */
122   sc_uint<32> addr_tx_frame_ptr;
123   sc_uint<32> rx_ptr_array;
124   sc_signal<bool> value;
125
126   void P();
127   void V();
128   bool get_value();
129   //   semaphore sem;
130
131   /* modules */
132//    mux_m *mux;
133//    shifter_m *shifter;
134//    out_fifo_m *out_fifo;
135//    in_fifo_m *in_fifo;
136
137   SC_CTOR(io_controller_m){
138
139      SC_CTHREAD(control_read, clk_i486_if.pos());
140
141//       mux = new mux_m("mux");
142//       mux->clk(clk_mii);
143//       mux->data4_o(mii_data4_o);
144//       mux->data32_i(mux_data32);
145//       mux->en_i(out_fifo_act);
146//       mux->en_o(mii_en_o);
147
148//       shifter = new shifter_m("shifter");
149//       shifter->clk(clk_mii);
150//       shifter->data32_o(in_fifo_data32);
151//       shifter->data4_i(mii_data4_i);
152//       shifter->en_i(mii_en_i);
153//       shifter->en_o(in_fifo_en);
154
155//       out_fifo = new out_fifo_m("out_fifo");
156//       out_fifo->clk_out(clk_mii);
157//       out_fifo->clk_in(clk_i486_if);
158//       out_fifo->data32_o(mux_data32);
159//       out_fifo->data32_i(out_fifo_data32);
160//       out_fifo->en_i(out_fifo_en);
161//       out_fifo->act_o(out_fifo_act);
162//       out_fifo->reset(out_fifo_reset);
163
164//       in_fifo = new in_fifo_m("in_fifo");
165//       in_fifo->clk_out(clk_i486_if);
166//       in_fifo->clk_in(clk_mii);
167//       in_fifo->data32_o(control_data32);
168//       in_fifo->data32_i(in_fifo_data32);
169//       in_fifo->en_i(in_fifo_en);
170//       in_fifo->en_o(control_en);
171
172//       /* Initialize */
173//       in_fifo_data32 = (sc_uint<32>) 0;
174//       mux_data32 = (sc_uint<32>) 0;
175//       out_fifo_en = 0;
176//       out_fifo_act = 0;
177//       //en_o = 0;
178//       in_fifo_en = 0;
179//       control_en = 0;
180//       out_fifo_reset = 0;
181
182   }
183   void control_write();
184   void control_read();
185   sc_uint<32> read_from_memory(sc_uint<32>);
186   void write_into_memory(sc_uint<32>, sc_uint<32>);
187
188};
189
190#endif
191
192