while_fsm.h revision 12855:588919e0e4aa 
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4  more contributor license agreements.  See the NOTICE file distributed
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6  Accellera licenses this file to you under the Apache License, Version 2.0
7  (the "License"); you may not use this file except in compliance with the
8  License.  You may obtain a copy of the License at
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10    http://www.apache.org/licenses/LICENSE-2.0
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12  Unless required by applicable law or agreed to in writing, software
13  distributed under the License is distributed on an "AS IS" BASIS,
14  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15  implied.  See the License for the specific language governing
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18 *****************************************************************************/
19
20/*****************************************************************************
21
22  while_fsm.h --
23
24  Original Author: Preeti Panda, Synopsys, Inc., 2000-08-09
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32
33      Name, Affiliation, Date:
34  Description of Modification:
35
36 *****************************************************************************/
37
38SC_MODULE( while_fsm )
39{
40    SC_HAS_PROCESS( while_fsm );
41
42    sc_in_clk clk;
43
44    const sc_signal<bool>&      reset;
45    const sc_signal<bool>&      in_valid;
46    const sc_signal<int>&       in_value;
47          sc_signal<bool>&      out_valid;
48          sc_signal<int>&       result;
49
50    while_fsm(
51              sc_module_name            NAME,        // referense name
52              sc_clock&                 CLK,          // clock
53	const sc_signal<bool>&          RESET,
54	const sc_signal<bool>&          IN_VALID,
55	const sc_signal<int>&           IN_VALUE,
56	      sc_signal<bool>&          OUT_VALID,
57              sc_signal<int>&           RESULT
58        )
59        :
60          reset          (RESET),
61          in_valid       (IN_VALID),
62          in_value       (IN_VALUE),
63          out_valid      (OUT_VALID),
64          result         (RESULT)
65    {
66      clk            (CLK);
67	  SC_CTHREAD( entry, clk.pos() );
68      reset_signal_is(reset,true);
69    };
70    void entry ();
71};
72