multtrans0.cpp revision 12855:588919e0e4aa 
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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6  Accellera licenses this file to you under the Apache License, Version 2.0
7  (the "License"); you may not use this file except in compliance with the
8  License.  You may obtain a copy of the License at
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10    http://www.apache.org/licenses/LICENSE-2.0
11
12  Unless required by applicable law or agreed to in writing, software
13  distributed under the License is distributed on an "AS IS" BASIS,
14  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15  implied.  See the License for the specific language governing
16  permissions and limitations under the License.
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19
20/*****************************************************************************
21
22  multtrans0.cpp --
23
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32
33      Name, Affiliation, Date:
34  Description of Modification:
35
36 *****************************************************************************/
37
38#include "systemc.h"
39
40SC_MODULE( delay1 )
41{
42  SC_HAS_PROCESS( delay1 );
43
44  sc_in<int>  data_i;
45  sc_out<int> data_o;
46
47  // Constructor
48  delay1( sc_module_name NAME,
49          sc_signal<int>& DATA_I,
50          sc_signal<int>& DATA_O )
51  {
52    data_i(DATA_I);
53	data_o(DATA_O);
54    SC_THREAD( entry );
55    sensitive << data_i;
56  }
57
58  // Functionality
59  void entry();
60};
61
62void delay1::entry()
63{
64  wait();
65  int buffer;
66  wait(); // until the first real event
67  buffer = data_i.read();
68  wait(); // until you get the next sample to send data out
69  while (true) {
70    data_o.write(buffer);
71    buffer = data_i.read();
72    wait();
73  }
74}
75
76SC_MODULE( state_machine )
77{
78  SC_HAS_PROCESS( state_machine );
79
80  sc_in<int>  data_i1;
81  sc_in<int>  data_i2;
82  sc_out<int> data_o;
83
84  int state;
85
86  // Constructor
87  state_machine( sc_module_name NAME,
88		 sc_signal<int>& DATA_I1,
89		 sc_signal<int>& DATA_I2,
90		 sc_signal<int>& DATA_O )
91  {
92    data_i1(DATA_I1); data_i2(DATA_I2); data_o(DATA_O);
93    SC_METHOD( entry );
94    sensitive << data_i1 << data_i2;
95
96    state = 0;
97  }
98
99  // Functionality
100  void entry();
101};
102
103void state_machine::entry()
104{
105  switch(state) {
106  case 0: // initial state
107    cout << "In state 0 :: " << flush;
108    if (data_i1.event()) {
109      if (data_i2.event()) {
110	data_o.write(data_i1.read() + data_i2.read());
111	cout << "staying in state 0" << endl;
112      }
113      else {
114	state = 1;
115	cout << "going to state 1" << endl;
116	// No output is written
117      }
118    }
119    else if (data_i2.event()) {
120      state = 2;
121      cout << "going to state 2" << endl;
122      // No output is written
123    }
124    break;
125  case 1: // Event on First input seen only
126    cout << "In state 1 :: " << flush;
127    if (data_i2.event()) {
128      if (data_i1.event()) {
129	state = 0;
130	cout << "going to state 0" << endl;
131	data_o.write(data_i1.read() + data_i2.read());
132      }
133      else {
134	cout << "going to state 2" << endl;
135	state = 2;
136	// No output written
137      }
138    }
139    else {
140      cout << "staying in state 1" << endl;
141    }
142    break;
143  case 2:
144    cout << "In state 2 :: " << flush;
145    if (data_i1.event()) {
146      if (data_i2.event()) {
147	state = 0;
148	cout << "going to state 0" << endl;
149	data_o.write(data_i1.read() + data_i2.read());
150      }
151      else {
152	cout << "going to state 1" << endl;
153	state = 1;
154	// No output written
155      }
156    }
157    else {
158      cout << "staying in state 2" << endl;
159    }
160    break;
161  default:
162    cout << "In bad state - resetting" << endl;
163    state = 0;
164    break;
165  }
166}
167
168void testbench(sc_signal<int>& data, const sc_signal<int>& res)
169{
170  int i;
171  sc_start(0, SC_NS);
172  for (i=0; i<10; i++) {
173    data.write(i*10 + 123);
174    sc_start( 10, SC_NS );
175    cout << "Result = " << res.read() << endl;
176    data.write(i * 11 - 34);
177    sc_start( 10, SC_NS );
178    cout << "Result = " << res.read() << endl;
179  }
180}
181
182int
183sc_main(int ac, char *av[])
184{
185  sc_signal<int> data_gen("Data");
186  sc_signal<int> data_delayed("DelayedData");
187  sc_signal<int> result("Result");
188
189  data_gen = 0;
190  data_delayed = 0;
191  result = 0;
192
193  delay1 D1("DL", data_gen, data_delayed);
194  state_machine SM("SM", data_gen, data_delayed, result);
195
196  testbench(data_gen, result);
197  return 0;
198}
199