test.h revision 12855:588919e0e4aa
12632Sstever@eecs.umich.edu/***************************************************************************** 22632Sstever@eecs.umich.edu 32632Sstever@eecs.umich.edu Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 42632Sstever@eecs.umich.edu more contributor license agreements. See the NOTICE file distributed 52632Sstever@eecs.umich.edu with this work for additional information regarding copyright ownership. 62632Sstever@eecs.umich.edu Accellera licenses this file to you under the Apache License, Version 2.0 72632Sstever@eecs.umich.edu (the "License"); you may not use this file except in compliance with the 86498Snate@binkert.org License. You may obtain a copy of the License at 94479Sbinkertn@umich.edu 104479Sbinkertn@umich.edu http://www.apache.org/licenses/LICENSE-2.0 112632Sstever@eecs.umich.edu 122632Sstever@eecs.umich.edu Unless required by applicable law or agreed to in writing, software 132632Sstever@eecs.umich.edu distributed under the License is distributed on an "AS IS" BASIS, 142632Sstever@eecs.umich.edu WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 152632Sstever@eecs.umich.edu implied. See the License for the specific language governing 162632Sstever@eecs.umich.edu permissions and limitations under the License. 172632Sstever@eecs.umich.edu 182632Sstever@eecs.umich.edu *****************************************************************************/ 192632Sstever@eecs.umich.edu 202632Sstever@eecs.umich.edu/***************************************************************************** 212632Sstever@eecs.umich.edu 222632Sstever@eecs.umich.edu test.h -- 232632Sstever@eecs.umich.edu 242632Sstever@eecs.umich.edu Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 252632Sstever@eecs.umich.edu 262632Sstever@eecs.umich.edu *****************************************************************************/ 272632Sstever@eecs.umich.edu 282632Sstever@eecs.umich.edu/***************************************************************************** 296498Snate@binkert.org 302632Sstever@eecs.umich.edu MODIFICATION LOG - modifiers, enter your name, affiliation, date and 312632Sstever@eecs.umich.edu changes you are making here. 322632Sstever@eecs.umich.edu 332632Sstever@eecs.umich.edu Name, Affiliation, Date: 342632Sstever@eecs.umich.edu Description of Modification: 352632Sstever@eecs.umich.edu 362632Sstever@eecs.umich.edu *****************************************************************************/ 372632Sstever@eecs.umich.edu 382632Sstever@eecs.umich.edu/* Common interface file for test cases 396498Snate@binkert.org Author: PRP 402632Sstever@eecs.umich.edu */ 412632Sstever@eecs.umich.edu 422632Sstever@eecs.umich.edu#include "systemc.h" 432632Sstever@eecs.umich.edu 442632Sstever@eecs.umich.eduSC_MODULE( test ) 452632Sstever@eecs.umich.edu{ 462632Sstever@eecs.umich.edu SC_HAS_PROCESS( test ); 472632Sstever@eecs.umich.edu 482632Sstever@eecs.umich.edu sc_in_clk clk; 492632Sstever@eecs.umich.edu 502632Sstever@eecs.umich.edu // Input Reset Port 512632Sstever@eecs.umich.edu const sc_signal<bool>& reset_sig; 522632Sstever@eecs.umich.edu 532632Sstever@eecs.umich.edu // Input Data Ports 542632Sstever@eecs.umich.edu // const sc_signal<int>& i1; 552632Sstever@eecs.umich.edu // const sc_signal<int>& i2; 562632Sstever@eecs.umich.edu // const sc_signal<int>& i3; 572632Sstever@eecs.umich.edu // const sc_signal<int>& i4; 586498Snate@binkert.org // const sc_signal<int>& i5; 592632Sstever@eecs.umich.edu sc_in<int> i1; 602632Sstever@eecs.umich.edu sc_in<int> i2; 612632Sstever@eecs.umich.edu sc_in<int> i3; 626498Snate@binkert.org sc_in<int> i4; 632632Sstever@eecs.umich.edu sc_in<int> i5; 642632Sstever@eecs.umich.edu 652632Sstever@eecs.umich.edu // Input Control Ports 662632Sstever@eecs.umich.edu const sc_signal<bool>& cont1; 672632Sstever@eecs.umich.edu const sc_signal<bool>& cont2; 682632Sstever@eecs.umich.edu const sc_signal<bool>& cont3; 69 70 // Output Data Ports 71 sc_signal<int>& o1; 72 sc_signal<int>& o2; 73 sc_signal<int>& o3; 74 sc_signal<int>& o4; 75 sc_signal<int>& o5; 76 77 // Constructor 78 test ( 79 sc_module_name NAME, 80 sc_clock& CLK, 81 82 const sc_signal<bool>& RESET_SIG, 83 84 const sc_signal<int>& I1, 85 const sc_signal<int>& I2, 86 const sc_signal<int>& I3, 87 const sc_signal<int>& I4, 88 const sc_signal<int>& I5, 89 90 const sc_signal<bool>& CONT1, 91 const sc_signal<bool>& CONT2, 92 const sc_signal<bool>& CONT3, 93 94 sc_signal<int>& O1, 95 sc_signal<int>& O2, 96 sc_signal<int>& O3, 97 sc_signal<int>& O4, 98 sc_signal<int>& O5) 99 : reset_sig(RESET_SIG), 100 cont1 (CONT1), cont2 (CONT2), 101 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) 102 { 103 clk(CLK); 104 i1(I1); i2(I2); i3(I3); i4(I4); i5(I5); 105 SC_CTHREAD( entry, clk.pos() ); 106 reset_signal_is(reset_sig,true); 107 } 108 109 void entry(); 110}; 111