a2901.cpp revision 12855:588919e0e4aa
1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 a2901.cpp -- 23 24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 25 26 *****************************************************************************/ 27 28/***************************************************************************** 29 30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 31 changes you are making here. 32 33 Name, Affiliation, Date: 34 Description of Modification: 35 36 *****************************************************************************/ 37 38#include "a2901.h" 39#include "a2901_test.h" 40 41SC_MODULE( twosome ) 42{ 43 // signals 44 sig4 Y; 45 sig1 t_RAM0, t_RAM3, t_Q0, t_Q3, C4; 46 sig1 Gbar, Pbar, OVR, F3, F30; 47 sig9 I; 48 sig4 Aadd, Badd, D; 49 sig1 RAM0, RAM3, Q0, Q3, C0, OEbar; 50 51 // modules 52 a2901 SLICE; 53 a2901_test TB; 54 55 // constructor 56 twosome( sc_module_name, 57 const sc_clock& CLK_ ) 58 : SLICE( "a2901", 59 CLK_, 60 I, Aadd, Badd, D, RAM0, RAM3, Q0, Q3, C0, OEbar, 61 Y, t_RAM0, t_RAM3, t_Q0, t_Q3, C4, Gbar, Pbar, OVR, F3, F30 ), 62 TB( "a2901_test", 63 CLK_, 64 Y, t_RAM0, t_RAM3, t_Q0, t_Q3, C4, Gbar, Pbar, OVR, F3, F30, 65 I, Aadd, Badd, D, RAM0, RAM3, Q0, Q3, C0, OEbar ) 66 {} 67}; 68 69int 70sc_main( int, char*[] ) 71{ 72 sc_clock clk; 73 74 twosome AA( "AA", clk ); 75 76 sc_start( 410000, SC_NS ); 77 78 cout << sc_time_stamp() << endl; 79 80 return 0; 81} 82