test1.cpp revision 12855:588919e0e4aa
1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 test1.cpp -- 23 24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 25 26 *****************************************************************************/ 27 28/***************************************************************************** 29 30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 31 changes you are making here. 32 33 Name, Affiliation, Date: 34 Description of Modification: 35 36 *****************************************************************************/ 37 38#include "systemc.h" 39 40SC_MODULE( proc1 ) 41{ 42 SC_HAS_PROCESS( proc1 ); 43 44 sc_signal_resolved& out; 45 sc_in<bool> in; 46 47 proc1( sc_module_name n, 48 sc_signal_resolved& OUT_, 49 sc_signal<bool>& IN_ ) 50 : out(OUT_) 51 { 52 in(IN_); 53 SC_METHOD( entry ); 54 sensitive << in; 55 } 56 57 void entry(); 58}; 59 60void 61proc1::entry() 62{ 63 if ((bool) in == true) { 64 cout << "P1: Set to 1" << endl; 65 out = SC_LOGIC_1;//'1'; 66 } 67 else { 68 cout << "P1: Set to Z" << endl; 69 out = SC_LOGIC_Z;//'Z'; 70 } 71} 72 73 74SC_MODULE( proc2 ) 75{ 76 SC_HAS_PROCESS( proc2 ); 77 78 sc_signal_resolved& out; 79 sc_in<bool> in; 80 81 proc2( sc_module_name n, 82 sc_signal_resolved& OUT_, 83 sc_signal<bool>& IN_ ) 84 : out(OUT_) 85 { 86 in(IN_); 87 SC_METHOD( entry ); 88 sensitive << in; 89 } 90 91 void entry(); 92}; 93 94void 95proc2::entry() 96{ 97 if ((bool) in == false) { 98 cout << "P2: Set to 0" << endl; 99 out = SC_LOGIC_0;//'0'; 100 } 101 else { 102 cout << "P2: Set to Z" << endl; 103 out = SC_LOGIC_Z;//'Z'; 104 } 105} 106 107SC_MODULE( proc3 ) 108{ 109 SC_HAS_PROCESS( proc3 ); 110 111 const sc_signal_resolved& in; 112 113 proc3( sc_module_name n, 114 const sc_signal_resolved& IN_ ) 115 : in(IN_) 116 { 117 SC_METHOD( entry ); 118 sensitive << in; 119 } 120 121 void entry() 122 { 123 sc_logic v; 124 v = in; 125 cout << "Value on Bus = " << v.to_char() << endl; 126 } 127}; 128 129int sc_main(int ac, char *av[]) 130{ 131 sc_signal_resolved Bus; 132 sc_signal<bool> clock; 133 134 proc1 P1("P1", Bus, clock); 135 proc2 P2("P2", Bus, clock); 136 proc3 P3("P3", Bus); 137 138 sc_start(1, SC_NS); 139 clock = 1; 140 sc_start(10, SC_NS); 141 for (int i = 0; i < 3; i++) { 142 clock = 0; 143 sc_start(10, SC_NS); 144 clock = 1; 145 sc_start(10, SC_NS); 146 } 147 return 0; 148} 149 150