fsm.cpp revision 12855:588919e0e4aa 
1/*****************************************************************************
2
3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4  more contributor license agreements.  See the NOTICE file distributed
5  with this work for additional information regarding copyright ownership.
6  Accellera licenses this file to you under the Apache License, Version 2.0
7  (the "License"); you may not use this file except in compliance with the
8  License.  You may obtain a copy of the License at
9
10    http://www.apache.org/licenses/LICENSE-2.0
11
12  Unless required by applicable law or agreed to in writing, software
13  distributed under the License is distributed on an "AS IS" BASIS,
14  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15  implied.  See the License for the specific language governing
16  permissions and limitations under the License.
17
18 *****************************************************************************/
19
20/*****************************************************************************
21
22  fsm.cpp --
23
24  Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-25
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32
33      Name, Affiliation, Date:
34  Description of Modification:
35
36 *****************************************************************************/
37
38
39#include "fsm.h"
40
41void fsm::entry(){
42
43  sc_biguint<4>   tmp1;
44  sc_biguint<4>   tmp2;
45  sc_biguint<4>   tmp3;
46  sc_unsigned     out_tmp2(12);
47  sc_unsigned     out_tmp3(12);
48
49  // reset_loop
50  if (reset.read() == true) {
51    out_value1.write(0);
52    out_value2.write(0);
53    out_value3.write(0);
54    out_valid1.write(false);
55    out_valid2.write(false);
56    out_valid3.write(false);
57    out_tmp3 = 0;
58    wait();
59  } else wait();
60
61  //
62  // main loop
63  //
64  while(1) {
65    do { wait(); } while  (in_valid == false);
66
67    //reading inputs
68    tmp1 = in_value1.read();
69    //easy, just a bunch of different waits
70    out_valid1.write(true);
71    wait();
72    if (tmp1 == 4) {
73      wait();
74      wait();
75      wait();
76      wait();
77      out_value1.write(3);
78      wait();
79    } else if (tmp1 == 3) {
80      out_value1.write(2);
81      wait();
82      wait();
83      wait();
84    } else if (tmp1 == 2) {
85      out_value1.write(1);
86      wait();
87      wait();
88    } else {
89      out_value1.write(tmp1);
90      wait();
91    };
92    out_valid1.write(false);
93    wait();
94
95    //the first branch should be pushed out in latency due to long delay
96    tmp2 = in_value2.read();
97    out_valid2.write(true);
98    wait();
99    if (tmp2<4) {
100      //long operation should extent latency
101      out_tmp2 = tmp2*tmp2*tmp2;
102      wait();
103    } else if (tmp2<8) {
104      //short operation should not extent latency
105      out_tmp2 = 4;
106      wait();
107    } else if (tmp2<12) {
108      //wait statements should extent latency
109      out_tmp2 = 1;
110      wait();
111      wait();
112      wait();
113    } else {
114      wait();
115    };
116    wait();
117
118    out_value2.write( sc_biguint<4>( out_tmp2 ) );
119    out_valid2.write(false);
120    wait();
121
122     // if branch without else maybe check later
123     tmp3 = in_value3.read();
124     out_valid3.write(true);
125//     wait();
126//     if (tmp3<8) {
127//       out_tmp3 = 4;
128//       wait();
129//     }
130
131    out_value3.write( sc_biguint<4>( out_tmp3 ) );
132    wait();
133    out_valid3.write(false);
134  }
135}
136
137// EOF
138
139