test04.log revision 12855:588919e0e4aa 
1SystemC Simulation
2bv2a = 01
3lv2b = 10
4bv4a = 0110
5bv4a = 1001
6bv4a = 1011
7bv2a = 10
8bv4a = 1101
9bv2a = 01
10bv2a = 00
11lv2b = 11
12bv4a = 0011
13bv4a = 1100
14bv2a = 11
15lv2b = 00
16bv2a = 00
17lv2b = 11
18bv4a = 1110
19bv4a = 1000
20bv2a = 11
21lv2b = 00
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