test08.cpp revision 12855:588919e0e4aa
1/*****************************************************************************
2
3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4  more contributor license agreements.  See the NOTICE file distributed
5  with this work for additional information regarding copyright ownership.
6  Accellera licenses this file to you under the Apache License, Version 2.0
7  (the "License"); you may not use this file except in compliance with the
8  License.  You may obtain a copy of the License at
9
10    http://www.apache.org/licenses/LICENSE-2.0
11
12  Unless required by applicable law or agreed to in writing, software
13  distributed under the License is distributed on an "AS IS" BASIS,
14  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15  implied.  See the License for the specific language governing
16  permissions and limitations under the License.
17
18 *****************************************************************************/
19
20/*****************************************************************************
21
22  test08.cpp --
23
24  Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15
25                   Martin Janssen, Synopsys, Inc., 2002-02-15
26
27 *****************************************************************************/
28
29/*****************************************************************************
30
31  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
32  changes you are making here.
33
34      Name, Affiliation, Date:
35  Description of Modification:
36
37 *****************************************************************************/
38
39// test of sc_prim_channel::next_trigger(sc_time&, sc_event_and_list&)
40
41#include <systemc.h>
42
43//write and read interfaces
44class write_if : virtual public
45sc_interface
46 {
47  public:
48   virtual void write() = 0;
49};
50
51class read_if : virtual public
52sc_interface
53{
54 public:
55  virtual void read( ) = 0;
56};
57
58// channel implements write_if and read_if interfaces
59class channel :
60  public sc_channel,
61  public write_if,
62  public read_if
63{
64
65  public :
66
67  //constructor
68  channel(sc_module_name name):sc_channel(name)  , data(0)
69  { }
70
71  //write to channel
72  void write(){
73    static int i = 0;
74    next_trigger(10, SC_NS);
75    data = i;
76
77    cout <<"simulation time" << ":" << sc_time_stamp()<<"    ";
78    cout<<"writing "<< data <<" to channel" << endl;
79
80    if(i < 3){
81      write_event_1.notify(20, SC_NS);
82    }
83    else if(3 <= i && i < 6) {
84      write_event_2.notify(5, SC_NS);
85	}
86    else{
87      write_event_2.notify(5, SC_NS);
88      write_event_1.notify(5, SC_NS);
89    }
90
91    i++;
92  }
93
94  //read from channel
95  void read( ){
96    int j;
97    const sc_time t(10, SC_NS);
98    next_trigger(t, write_event_1 & write_event_2);
99    j = data;
100    cout <<"simulation time" << ":" << sc_time_stamp();
101    cout<<"    reading "<<j<<" from channel" << endl;
102  }
103
104  private:
105  int data;
106  sc_event write_event_1, write_event_2;
107
108};
109
110//source module
111SC_MODULE(mod_a)
112{
113  sc_port<write_if> out;
114
115  void write( )
116  {
117    out->write();
118  }
119
120  SC_CTOR( mod_a ){
121
122    SC_METHOD(write);
123  }
124};
125
126//sink module
127SC_MODULE(mod_b)
128{
129  sc_port<read_if> input;
130  int i;
131
132  void read( )
133  {
134   input->read();
135  }
136
137  SC_CTOR( mod_b ){
138
139    SC_METHOD(read);
140  }
141};
142
143
144int sc_main(int, char*[] )
145{
146  channel a("a");
147  mod_a modul_a("modul_a");
148  mod_b modul_b("modul_b");
149  modul_a.out(a);
150  modul_b.input(a);
151
152  sc_start(120, SC_NS);
153  return 0 ;
154}
155