test03.cpp revision 12855:588919e0e4aa 
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20/*****************************************************************************
21
22  test03.cpp --
23
24  Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15
25                   Martin Janssen, Synopsys, Inc., 2002-02-15
26
27 *****************************************************************************/
28
29/*****************************************************************************
30
31  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
32  changes you are making here.
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34      Name, Affiliation, Date:
35  Description of Modification:
36
37 *****************************************************************************/
38
39// test of sc_port constructors for sc_signal_in(inout)_if interface
40
41#include "systemc.h"
42
43
44SC_MODULE( mod_b )
45{
46
47  sc_port<sc_signal_in_if<bool>,1> input_1;
48  sc_port<sc_signal_in_if<sc_logic>,1> input_2;
49  sc_port<sc_signal_in_if<bool>,1> input_3;
50  sc_port<sc_signal_in_if<sc_logic>,1> input_4;
51  sc_port<sc_signal_inout_if<bool>,1> inout_1;
52  sc_port<sc_signal_inout_if<sc_logic>,1> inout_2;
53  sc_port<sc_signal_inout_if<bool>,1> inout_3;
54  sc_port<sc_signal_inout_if<sc_logic>,1> inout_4;
55
56
57  SC_CTOR( mod_b )
58   { }
59};
60
61SC_MODULE( mod_c )
62{
63  mod_b b;
64
65  sc_signal<bool> sig1;
66  sc_signal<bool> sig2;
67  sc_signal<sc_logic> sig3;
68  sc_signal<sc_logic> sig4;
69
70  sc_port<sc_signal_in_if<bool>,1> in1;
71  sc_port<sc_signal_in_if<sc_logic>,1> in2;
72  sc_port<sc_signal_inout_if<bool>,1> inout1;
73  sc_port<sc_signal_inout_if<sc_logic>,1> inout2;
74  sc_port<sc_signal_in_if<bool>,1> in3;
75  sc_port<sc_signal_in_if<sc_logic>,1> in4;
76  sc_port<sc_signal_inout_if<bool>,1> inout3;
77  sc_port<sc_signal_inout_if<sc_logic>,1> inout4;
78  sc_port<sc_signal_in_if<bool>,1> in5;
79  sc_port<sc_signal_in_if<sc_logic>,1> in6;
80  sc_port<sc_signal_inout_if<bool>,1> inout5;
81  sc_port<sc_signal_inout_if<sc_logic>,1> inout6;
82
83
84  SC_CTOR( mod_c )
85    : b("b"),
86      sig1("sig_1"),sig2("sig_2"), sig3("sig_3"), sig4("sig_4"),
87      in1( "in_1", sig1 ), in2( "in_2", sig3 ), inout1( "inout_1", sig2),
88      inout2( "inout_2", sig4),
89      in3("in_3", b.input_1), in4("in_4", b.input_2),
90      inout3("inout_3", b.inout_1), inout4("inout_4", b.inout_2),
91      in5(b.input_3), in6(b.input_4), inout5(b.inout_3),
92      inout6(b.inout_4)
93  {}
94};
95
96
97#define WRITE(a) \
98    cout << a.name() << " (" << a.kind() << ")" << endl
99
100
101int sc_main(int, char* []){
102
103  mod_c c("c");
104  WRITE(c.sig1);
105  WRITE(c.sig2);
106  WRITE(c.sig3);
107  WRITE(c.sig4);
108  WRITE(c.in1);
109  WRITE(c.in2);
110  WRITE(c.in3);
111  WRITE(c.in4);
112  WRITE(c.in5);
113  WRITE(c.in6);
114  WRITE(c.inout1);
115  WRITE(c.inout2);
116  WRITE(c.inout3);
117  WRITE(c.inout4);
118  WRITE(c.inout5);
119  WRITE(c.inout6);
120
121  return 0;
122}
123