test01.log revision 12855:588919e0e4aa 
1SystemC Simulation
2a.in_clk (sc_in)
3a.inout_clk (sc_inout)
4a.out_clk (sc_out)
5a.fifo_in (sc_fifo_in)
6a.fifo_out (sc_fifo_out)
7a.port (sc_port)
8a.in_int (sc_in)
9a.in_bool (sc_in)
10a.in_logic (sc_in)
11a.inout_int (sc_inout)
12a.inout_bool (sc_inout)
13a.inout_logic (sc_inout)
14a.out_int (sc_out)
15a.out_bool (sc_out)
16a.out_logic (sc_out)
17a.in_resolved (sc_in_resolved)
18a.inout_resolved (sc_inout_resolved)
19a.out_resolved (sc_out_resolved)
20a.in_rv (sc_in_rv)
21a.inout_rv (sc_inout_rv)
22a.out_rv (sc_out_rv)
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