xref: /gem5/src/systemc/ext/tlm_core/1/analysis/write_if.hh

/*****************************************************************************

  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
  more contributor license agreements.  See the NOTICE file distributed
  with this work for additional information regarding copyright ownership.
  Accellera licenses this file to you under the Apache License, Version 2.0
  (the "License"); you may not use this file except in compliance with the
  License.  You may obtain a copy of the License at

    http://www.apache.org/licenses/LICENSE-2.0

  Unless required by applicable law or agreed to in writing, software
  distributed under the License is distributed on an "AS IS" BASIS,
  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
  implied.  See the License for the specific language governing
  permissions and limitations under the License.

 *****************************************************************************/

#ifndef __SYSTEMC_EXT_TLM_CORE_1_ANALYSIS_WRITE_IF_HH__
#define __SYSTEMC_EXT_TLM_CORE_1_ANALYSIS_WRITE_IF_HH__

#include "../../../core/sc_interface.hh"

namespace tlm
{

template <typename T>
class tlm_write_if : public virtual sc_core::sc_interface
{
  public:
    virtual void write(const T &t) = 0;
};

template <typename T>
class tlm_delayed_write_if : public virtual sc_core::sc_interface
{
  public:
    virtual void write(const T &t, const sc_core::sc_time &time) = 0;
};

} // namespace tlm

#endif /* __SYSTEMC_EXT_TLM_CORE_1_ANALYSIS_WRITE_IF_HH__ */