vptr.hh revision 5191
12315SN/A/* 22332SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 32315SN/A * All rights reserved. 42315SN/A * 52315SN/A * Redistribution and use in source and binary forms, with or without 62315SN/A * modification, are permitted provided that the following conditions are 72315SN/A * met: redistributions of source code must retain the above copyright 82315SN/A * notice, this list of conditions and the following disclaimer; 92315SN/A * redistributions in binary form must reproduce the above copyright 102315SN/A * notice, this list of conditions and the following disclaimer in the 112315SN/A * documentation and/or other materials provided with the distribution; 122315SN/A * neither the name of the copyright holders nor the names of its 132315SN/A * contributors may be used to endorse or promote products derived from 142315SN/A * this software without specific prior written permission. 152315SN/A * 162315SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172315SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182315SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192315SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202315SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212315SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222315SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232315SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242315SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252315SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262315SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689SN/A * 282689SN/A * Authors: Nathan Binkert 292315SN/A */ 302315SN/A 312315SN/A#ifndef __ARCH_ALPHA_VPTR_HH__ 322315SN/A#define __ARCH_ALPHA_VPTR_HH__ 332315SN/A 342315SN/A#include "arch/vtophys.hh" 356658Snate@binkert.org#include "arch/isa_traits.hh" 362315SN/A#include "mem/vport.hh" 372315SN/A 382683SN/Aclass ThreadContext; 392680SN/A 402315SN/Atemplate <class T> 412315SN/Aclass VPtr 422315SN/A{ 432315SN/A public: 442315SN/A typedef T Type; 452315SN/A 462315SN/A protected: 472315SN/A ThreadContext *tc; 482315SN/A Addr ptr; 492315SN/A Addr buffer[(sizeof(T)-1)/sizeof(Addr) + 1]; 502315SN/A 512315SN/A public: 522315SN/A explicit VPtr(ThreadContext *_tc, Addr p = 0) 532315SN/A : tc(_tc), ptr(p) 542732SN/A { 552315SN/A refresh(); 562315SN/A } 572315SN/A 582332SN/A template <class U> 592332SN/A VPtr(const VPtr<U> &vp) 602332SN/A : tc(vp.tc), ptr(vp.ptr) 612332SN/A { 622332SN/A refresh(); 632315SN/A } 642315SN/A 652315SN/A ~VPtr() 662315SN/A {} 672315SN/A 682315SN/A void 692315SN/A refresh() 702315SN/A { 712315SN/A if (!ptr) 722315SN/A return; 732315SN/A 742315SN/A VirtualPort *port = tc->getVirtPort(tc); 752315SN/A port->readBlob(ptr, buffer, sizeof(T)); 762315SN/A tc->delVirtPort(port); 772315SN/A } 782315SN/A 792315SN/A bool 802315SN/A operator!() const 812315SN/A { 822315SN/A return ptr == 0; 832315SN/A } 842315SN/A 852315SN/A VPtr<T> 862315SN/A operator+(int offset) 872315SN/A { 882315SN/A return VPtr<T>(tc, ptr + offset); 892315SN/A } 902315SN/A 912315SN/A const VPtr<T> & 922315SN/A operator+=(int offset) 932315SN/A { 942315SN/A ptr += offset; 952315SN/A refresh(); 962354SN/A 972354SN/A return *this; 982332SN/A } 992332SN/A 1002332SN/A const VPtr<T> & 1012315SN/A operator=(Addr p) 1022315SN/A { 1032315SN/A ptr = p; 1042315SN/A refresh(); 1052315SN/A 1062679SN/A return *this; 1072315SN/A } 1082315SN/A 1092315SN/A template <class U> 1102315SN/A const VPtr<T> & 1112315SN/A operator=(const VPtr<U> &vp) 1122683SN/A { 1132315SN/A tc = vp.tc; 1142683SN/A ptr = vp.ptr; 1152315SN/A refresh(); 1162315SN/A 1172332SN/A return *this; 1182332SN/A } 1192332SN/A 1202315SN/A operator T *() 1212315SN/A { 1222683SN/A return (T *)buffer; 1232315SN/A } 1242683SN/A 1252315SN/A T * 1262315SN/A operator->() 1272332SN/A { 1282332SN/A return (T *)buffer; 1292683SN/A } 1302732SN/A 1312315SN/A T & 1322315SN/A operator*() 1332315SN/A { 1342315SN/A return *(T *)buffer; 1352315SN/A } 1362315SN/A}; 1372315SN/A 1382683SN/A#endif // __ARCH_ALPHA_VPTR_HH__ 1392315SN/A