system.hh revision 5795:72ce7502dc71
110458Sandreas.hansson@arm.com/*
210458Sandreas.hansson@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan
310458Sandreas.hansson@arm.com * All rights reserved.
410458Sandreas.hansson@arm.com *
510458Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without
610458Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are
710458Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright
810458Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer;
910458Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright
1010458Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the
1110458Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution;
1210458Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its
1310458Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from
1410458Sandreas.hansson@arm.com * this software without specific prior written permission.
1510458Sandreas.hansson@arm.com *
1610458Sandreas.hansson@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1710458Sandreas.hansson@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1810458Sandreas.hansson@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1910458Sandreas.hansson@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2010458Sandreas.hansson@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2110458Sandreas.hansson@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2210458Sandreas.hansson@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2310458Sandreas.hansson@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2410458Sandreas.hansson@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2510458Sandreas.hansson@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2610458Sandreas.hansson@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2710458Sandreas.hansson@arm.com *
2810458Sandreas.hansson@arm.com * Authors: Steve Reinhardt
2910458Sandreas.hansson@arm.com *          Lisa Hsu
3010458Sandreas.hansson@arm.com *          Nathan Binkert
3110458Sandreas.hansson@arm.com */
3210458Sandreas.hansson@arm.com
3310458Sandreas.hansson@arm.com#ifndef __SYSTEM_HH__
3410458Sandreas.hansson@arm.com#define __SYSTEM_HH__
3510458Sandreas.hansson@arm.com
3610458Sandreas.hansson@arm.com#include <string>
3710458Sandreas.hansson@arm.com#include <vector>
3810458Sandreas.hansson@arm.com
3910458Sandreas.hansson@arm.com#include "base/loader/symtab.hh"
4010458Sandreas.hansson@arm.com#include "base/misc.hh"
4110458Sandreas.hansson@arm.com#include "base/statistics.hh"
4210458Sandreas.hansson@arm.com#include "config/full_system.hh"
4310458Sandreas.hansson@arm.com#include "cpu/pc_event.hh"
4410458Sandreas.hansson@arm.com#include "enums/MemoryMode.hh"
4510458Sandreas.hansson@arm.com#include "mem/port.hh"
4610458Sandreas.hansson@arm.com#include "params/System.hh"
4710458Sandreas.hansson@arm.com#include "sim/sim_object.hh"
4812564Sgabeblack@google.com#if FULL_SYSTEM
4912564Sgabeblack@google.com#include "kern/system_events.hh"
5010458Sandreas.hansson@arm.com#include "mem/vport.hh"
5110458Sandreas.hansson@arm.com#endif
5210458Sandreas.hansson@arm.com
5310458Sandreas.hansson@arm.comclass BaseCPU;
5410458Sandreas.hansson@arm.comclass ThreadContext;
5510458Sandreas.hansson@arm.comclass ObjectFile;
5610458Sandreas.hansson@arm.comclass PhysicalMemory;
5710458Sandreas.hansson@arm.com
5810458Sandreas.hansson@arm.com#if FULL_SYSTEM
5910458Sandreas.hansson@arm.comclass Platform;
6010458Sandreas.hansson@arm.com#endif
6110458Sandreas.hansson@arm.comclass GDBListener;
6210458Sandreas.hansson@arm.comnamespace TheISA
6310458Sandreas.hansson@arm.com{
6410458Sandreas.hansson@arm.com    class RemoteGDB;
6510458Sandreas.hansson@arm.com}
6610458Sandreas.hansson@arm.com
6710458Sandreas.hansson@arm.comclass System : public SimObject
6810458Sandreas.hansson@arm.com{
6910458Sandreas.hansson@arm.com  public:
7010458Sandreas.hansson@arm.com
7110458Sandreas.hansson@arm.com    static const char *MemoryModeStrings[3];
7210458Sandreas.hansson@arm.com
7310458Sandreas.hansson@arm.com    Enums::MemoryMode
7410458Sandreas.hansson@arm.com    getMemoryMode()
7510458Sandreas.hansson@arm.com    {
7610458Sandreas.hansson@arm.com        assert(memoryMode);
7710458Sandreas.hansson@arm.com        return memoryMode;
7810458Sandreas.hansson@arm.com    }
7910458Sandreas.hansson@arm.com
8010458Sandreas.hansson@arm.com    /** Change the memory mode of the system. This should only be called by the
8110458Sandreas.hansson@arm.com     * python!!
8210458Sandreas.hansson@arm.com     * @param mode Mode to change to (atomic/timing)
8310458Sandreas.hansson@arm.com     */
8410458Sandreas.hansson@arm.com    void setMemoryMode(Enums::MemoryMode mode);
8510458Sandreas.hansson@arm.com
8610458Sandreas.hansson@arm.com    PhysicalMemory *physmem;
8712410Sgabeblack@google.com    PCEventQueue pcEventQueue;
8812410Sgabeblack@google.com
8912410Sgabeblack@google.com    std::vector<ThreadContext *> threadContexts;
9012410Sgabeblack@google.com    int _numContexts;
9112410Sgabeblack@google.com
9212410Sgabeblack@google.com    ThreadContext * getThreadContext(int tid)
9310458Sandreas.hansson@arm.com    {
9410458Sandreas.hansson@arm.com        return threadContexts[tid];
9510458Sandreas.hansson@arm.com    }
9610458Sandreas.hansson@arm.com
9710458Sandreas.hansson@arm.com    int numContexts()
9810458Sandreas.hansson@arm.com    {
9910458Sandreas.hansson@arm.com        if (_numContexts != threadContexts.size())
10010458Sandreas.hansson@arm.com            panic("cpu array not fully populated!");
10110458Sandreas.hansson@arm.com
10210458Sandreas.hansson@arm.com        return _numContexts;
10310458Sandreas.hansson@arm.com    }
10410458Sandreas.hansson@arm.com
10510458Sandreas.hansson@arm.com#if FULL_SYSTEM
10610458Sandreas.hansson@arm.com    Platform *platform;
10710458Sandreas.hansson@arm.com    uint64_t init_param;
10810458Sandreas.hansson@arm.com
10910458Sandreas.hansson@arm.com    /** Port to physical memory used for writing object files into ram at
11011228SAndrew.Bardsley@arm.com     * boot.*/
11110458Sandreas.hansson@arm.com    FunctionalPort functionalPort;
11210458Sandreas.hansson@arm.com    VirtualPort virtPort;
11310458Sandreas.hansson@arm.com
11410458Sandreas.hansson@arm.com    /** kernel symbol table */
11510458Sandreas.hansson@arm.com    SymbolTable *kernelSymtab;
11610458Sandreas.hansson@arm.com
11710458Sandreas.hansson@arm.com    /** Object pointer for the kernel code */
11811228SAndrew.Bardsley@arm.com    ObjectFile *kernel;
11911228SAndrew.Bardsley@arm.com
12010458Sandreas.hansson@arm.com    /** Begining of kernel code */
12110458Sandreas.hansson@arm.com    Addr kernelStart;
12210458Sandreas.hansson@arm.com
12310458Sandreas.hansson@arm.com    /** End of kernel code */
12410458Sandreas.hansson@arm.com    Addr kernelEnd;
12510458Sandreas.hansson@arm.com
12610458Sandreas.hansson@arm.com    /** Entry point in the kernel to start at */
12710458Sandreas.hansson@arm.com    Addr kernelEntry;
12810458Sandreas.hansson@arm.com
12910458Sandreas.hansson@arm.com#else
13010458Sandreas.hansson@arm.com
13110458Sandreas.hansson@arm.com    int page_ptr;
13210458Sandreas.hansson@arm.com
13310458Sandreas.hansson@arm.com  protected:
13410458Sandreas.hansson@arm.com    uint64_t next_PID;
13510458Sandreas.hansson@arm.com
13610458Sandreas.hansson@arm.com  public:
13710458Sandreas.hansson@arm.com    uint64_t allocatePID()
13810458Sandreas.hansson@arm.com    {
13910458Sandreas.hansson@arm.com        return next_PID++;
14010458Sandreas.hansson@arm.com    }
14110458Sandreas.hansson@arm.com
14210458Sandreas.hansson@arm.com    /** Amount of physical memory that is still free */
14310458Sandreas.hansson@arm.com    Addr freeMemSize();
14410458Sandreas.hansson@arm.com
14510458Sandreas.hansson@arm.com    /** Amount of physical memory that exists */
14610458Sandreas.hansson@arm.com    Addr memSize();
14710458Sandreas.hansson@arm.com
14810458Sandreas.hansson@arm.com
14910458Sandreas.hansson@arm.com#endif // FULL_SYSTEM
15010458Sandreas.hansson@arm.com
15110458Sandreas.hansson@arm.com  protected:
15210458Sandreas.hansson@arm.com    Enums::MemoryMode memoryMode;
15310458Sandreas.hansson@arm.com
15410458Sandreas.hansson@arm.com#if FULL_SYSTEM
15510458Sandreas.hansson@arm.com    /**
15610458Sandreas.hansson@arm.com     * Fix up an address used to match PCs for hooking simulator
15710458Sandreas.hansson@arm.com     * events on to target function executions.  See comment in
15810458Sandreas.hansson@arm.com     * system.cc for details.
15910458Sandreas.hansson@arm.com     */
16010458Sandreas.hansson@arm.com    virtual Addr fixFuncEventAddr(Addr addr) = 0;
16110458Sandreas.hansson@arm.com
16210458Sandreas.hansson@arm.com    /**
16310458Sandreas.hansson@arm.com     * Add a function-based event to the given function, to be looked
16410458Sandreas.hansson@arm.com     * up in the specified symbol table.
16510458Sandreas.hansson@arm.com     */
16610458Sandreas.hansson@arm.com    template <class T>
16710458Sandreas.hansson@arm.com    T *addFuncEvent(SymbolTable *symtab, const char *lbl)
16810458Sandreas.hansson@arm.com    {
16910458Sandreas.hansson@arm.com        Addr addr = 0; // initialize only to avoid compiler warning
17010458Sandreas.hansson@arm.com
17110458Sandreas.hansson@arm.com        if (symtab->findAddress(lbl, addr)) {
17210458Sandreas.hansson@arm.com            T *ev = new T(&pcEventQueue, lbl, fixFuncEventAddr(addr));
17310458Sandreas.hansson@arm.com            return ev;
17410458Sandreas.hansson@arm.com        }
17510458Sandreas.hansson@arm.com
17610458Sandreas.hansson@arm.com        return NULL;
17710458Sandreas.hansson@arm.com    }
17810458Sandreas.hansson@arm.com
17910458Sandreas.hansson@arm.com    /** Add a function-based event to kernel code. */
18010458Sandreas.hansson@arm.com    template <class T>
18110458Sandreas.hansson@arm.com    T *addKernelFuncEvent(const char *lbl)
18210458Sandreas.hansson@arm.com    {
18310458Sandreas.hansson@arm.com        return addFuncEvent<T>(kernelSymtab, lbl);
18410458Sandreas.hansson@arm.com    }
18510458Sandreas.hansson@arm.com
18610458Sandreas.hansson@arm.com#endif
18710458Sandreas.hansson@arm.com  public:
18810458Sandreas.hansson@arm.com    std::vector<TheISA::RemoteGDB *> remoteGDB;
18910458Sandreas.hansson@arm.com    std::vector<GDBListener *> gdbListen;
19010458Sandreas.hansson@arm.com    bool breakpoint();
19110458Sandreas.hansson@arm.com
19210458Sandreas.hansson@arm.com  public:
19310458Sandreas.hansson@arm.com    typedef SystemParams Params;
19410458Sandreas.hansson@arm.com
19510458Sandreas.hansson@arm.com  protected:
19610458Sandreas.hansson@arm.com    Params *_params;
19710458Sandreas.hansson@arm.com
19810458Sandreas.hansson@arm.com  public:
19910458Sandreas.hansson@arm.com    System(Params *p);
20010458Sandreas.hansson@arm.com    ~System();
20110458Sandreas.hansson@arm.com
20210458Sandreas.hansson@arm.com    void startup();
20310458Sandreas.hansson@arm.com
20410458Sandreas.hansson@arm.com    const Params *params() const { return (const Params *)_params; }
20510458Sandreas.hansson@arm.com
20610458Sandreas.hansson@arm.com  public:
20710458Sandreas.hansson@arm.com
20810458Sandreas.hansson@arm.com#if FULL_SYSTEM
20910458Sandreas.hansson@arm.com    /**
21010458Sandreas.hansson@arm.com     * Returns the addess the kernel starts at.
21110458Sandreas.hansson@arm.com     * @return address the kernel starts at
21210458Sandreas.hansson@arm.com     */
21310458Sandreas.hansson@arm.com    Addr getKernelStart() const { return kernelStart; }
21410458Sandreas.hansson@arm.com
21510458Sandreas.hansson@arm.com    /**
21610458Sandreas.hansson@arm.com     * Returns the addess the kernel ends at.
21710458Sandreas.hansson@arm.com     * @return address the kernel ends at
21810458Sandreas.hansson@arm.com     */
21910458Sandreas.hansson@arm.com    Addr getKernelEnd() const { return kernelEnd; }
22012411Sgabeblack@google.com
22112411Sgabeblack@google.com    /**
22212411Sgabeblack@google.com     * Returns the addess the entry point to the kernel code.
22312411Sgabeblack@google.com     * @return entry point of the kernel code
22410458Sandreas.hansson@arm.com     */
22510458Sandreas.hansson@arm.com    Addr getKernelEntry() const { return kernelEntry; }
22610458Sandreas.hansson@arm.com
22710458Sandreas.hansson@arm.com#else
22810458Sandreas.hansson@arm.com
22910458Sandreas.hansson@arm.com    Addr new_page();
23010458Sandreas.hansson@arm.com
23110458Sandreas.hansson@arm.com#endif // FULL_SYSTEM
23210458Sandreas.hansson@arm.com
23310458Sandreas.hansson@arm.com    int registerThreadContext(ThreadContext *tc, int assigned=-1);
23410458Sandreas.hansson@arm.com    void replaceThreadContext(ThreadContext *tc, int context_id);
23510458Sandreas.hansson@arm.com
23610458Sandreas.hansson@arm.com    void serialize(std::ostream &os);
23710458Sandreas.hansson@arm.com    void unserialize(Checkpoint *cp, const std::string &section);
23810458Sandreas.hansson@arm.com
23910458Sandreas.hansson@arm.com  public:
24010458Sandreas.hansson@arm.com    ////////////////////////////////////////////
24110458Sandreas.hansson@arm.com    //
24212411Sgabeblack@google.com    // STATIC GLOBAL SYSTEM LIST
24312411Sgabeblack@google.com    //
24410458Sandreas.hansson@arm.com    ////////////////////////////////////////////
24510458Sandreas.hansson@arm.com
24610458Sandreas.hansson@arm.com    static std::vector<System *> systemList;
24710458Sandreas.hansson@arm.com    static int numSystemsRunning;
24810458Sandreas.hansson@arm.com
24910458Sandreas.hansson@arm.com    static void printSystems();
25010458Sandreas.hansson@arm.com
25110458Sandreas.hansson@arm.com
25210458Sandreas.hansson@arm.com};
25310458Sandreas.hansson@arm.com
25410458Sandreas.hansson@arm.com#endif // __SYSTEM_HH__
25510458Sandreas.hansson@arm.com