system.hh revision 7723
12SN/A/* 21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Lisa Hsu 302665Ssaidi@eecs.umich.edu * Nathan Binkert 312SN/A */ 322SN/A 332SN/A#ifndef __SYSTEM_HH__ 342SN/A#define __SYSTEM_HH__ 352SN/A 362SN/A#include <string> 3775SN/A#include <vector> 382SN/A 392439SN/A#include "base/loader/symtab.hh" 402439SN/A#include "base/misc.hh" 41603SN/A#include "base/statistics.hh" 422986Sgblack@eecs.umich.edu#include "config/full_system.hh" 43603SN/A#include "cpu/pc_event.hh" 444762Snate@binkert.org#include "enums/MemoryMode.hh" 452520SN/A#include "mem/port.hh" 464762Snate@binkert.org#include "params/System.hh" 472378SN/A#include "sim/sim_object.hh" 486658Snate@binkert.org 492378SN/A#if FULL_SYSTEM 50722SN/A#include "kern/system_events.hh" 512378SN/A#endif 52312SN/A 531634SN/Aclass BaseCPU; 542680Sktlim@umich.educlass ThreadContext; 551634SN/Aclass ObjectFile; 562521SN/Aclass PhysicalMemory; 572378SN/A 582378SN/A#if FULL_SYSTEM 59803SN/Aclass Platform; 607723SAli.Saidi@ARM.comclass FunctionalPort; 617723SAli.Saidi@ARM.comclass VirtualPort; 623960Sgblack@eecs.umich.edu#endif 632378SN/Aclass GDBListener; 646658Snate@binkert.orgclass BaseRemoteGDB; 652SN/A 662SN/Aclass System : public SimObject 672SN/A{ 68603SN/A public: 692901Ssaidi@eecs.umich.edu 702902Ssaidi@eecs.umich.edu static const char *MemoryModeStrings[3]; 712902Ssaidi@eecs.umich.edu 724762Snate@binkert.org Enums::MemoryMode 734762Snate@binkert.org getMemoryMode() 744762Snate@binkert.org { 754762Snate@binkert.org assert(memoryMode); 764762Snate@binkert.org return memoryMode; 774762Snate@binkert.org } 782901Ssaidi@eecs.umich.edu 792901Ssaidi@eecs.umich.edu /** Change the memory mode of the system. This should only be called by the 802901Ssaidi@eecs.umich.edu * python!! 812901Ssaidi@eecs.umich.edu * @param mode Mode to change to (atomic/timing) 822901Ssaidi@eecs.umich.edu */ 834762Snate@binkert.org void setMemoryMode(Enums::MemoryMode mode); 842901Ssaidi@eecs.umich.edu 852521SN/A PhysicalMemory *physmem; 862SN/A PCEventQueue pcEventQueue; 872SN/A 882680Sktlim@umich.edu std::vector<ThreadContext *> threadContexts; 895714Shsul@eecs.umich.edu int _numContexts; 901806SN/A 916221Snate@binkert.org ThreadContext *getThreadContext(ThreadID tid) 925713Shsul@eecs.umich.edu { 935713Shsul@eecs.umich.edu return threadContexts[tid]; 945713Shsul@eecs.umich.edu } 955713Shsul@eecs.umich.edu 965714Shsul@eecs.umich.edu int numContexts() 971806SN/A { 986227Snate@binkert.org assert(_numContexts == (int)threadContexts.size()); 995714Shsul@eecs.umich.edu return _numContexts; 1001806SN/A } 101180SN/A 1026029Ssteve.reinhardt@amd.com /** Return number of running (non-halted) thread contexts in 1036029Ssteve.reinhardt@amd.com * system. These threads could be Active or Suspended. */ 1046029Ssteve.reinhardt@amd.com int numRunningContexts(); 1056029Ssteve.reinhardt@amd.com 1062378SN/A#if FULL_SYSTEM 1072378SN/A Platform *platform; 1082378SN/A uint64_t init_param; 1092378SN/A 1102520SN/A /** Port to physical memory used for writing object files into ram at 1112520SN/A * boot.*/ 1127723SAli.Saidi@ARM.com FunctionalPort *functionalPort; 1137723SAli.Saidi@ARM.com VirtualPort *virtPort; 1142520SN/A 1151885SN/A /** kernel symbol table */ 1161070SN/A SymbolTable *kernelSymtab; 117954SN/A 1181070SN/A /** Object pointer for the kernel code */ 1191070SN/A ObjectFile *kernel; 1201070SN/A 1211070SN/A /** Begining of kernel code */ 1221070SN/A Addr kernelStart; 1231070SN/A 1241070SN/A /** End of kernel code */ 1251070SN/A Addr kernelEnd; 1261070SN/A 1271070SN/A /** Entry point in the kernel to start at */ 1281070SN/A Addr kernelEntry; 1291070SN/A 1307580SAli.Saidi@arm.com /** Mask that should be anded for binary/symbol loading. 1317580SAli.Saidi@arm.com * This allows one two different OS requirements for the same ISA to be 1327580SAli.Saidi@arm.com * handled. Some OSes are compiled for a virtual address and need to be 1337580SAli.Saidi@arm.com * loaded into physical memory that starts at address 0, while other 1347580SAli.Saidi@arm.com * bare metal tools generate images that start at address 0. 1357580SAli.Saidi@arm.com */ 1367580SAli.Saidi@arm.com Addr loadAddrMask; 1377580SAli.Saidi@arm.com 1382378SN/A#else 1392378SN/A 1402378SN/A int page_ptr; 1412378SN/A 1424997Sgblack@eecs.umich.edu protected: 1434997Sgblack@eecs.umich.edu uint64_t next_PID; 1444997Sgblack@eecs.umich.edu 1454997Sgblack@eecs.umich.edu public: 1464997Sgblack@eecs.umich.edu uint64_t allocatePID() 1474997Sgblack@eecs.umich.edu { 1484997Sgblack@eecs.umich.edu return next_PID++; 1494997Sgblack@eecs.umich.edu } 1504997Sgblack@eecs.umich.edu 1515795Ssaidi@eecs.umich.edu /** Amount of physical memory that is still free */ 1525795Ssaidi@eecs.umich.edu Addr freeMemSize(); 1535795Ssaidi@eecs.umich.edu 1545795Ssaidi@eecs.umich.edu /** Amount of physical memory that exists */ 1555795Ssaidi@eecs.umich.edu Addr memSize(); 1565795Ssaidi@eecs.umich.edu 1572378SN/A 1582378SN/A#endif // FULL_SYSTEM 1592378SN/A 1601885SN/A protected: 1614762Snate@binkert.org Enums::MemoryMode memoryMode; 1622901Ssaidi@eecs.umich.edu 1632424SN/A#if FULL_SYSTEM 1641885SN/A /** 1651885SN/A * Fix up an address used to match PCs for hooking simulator 1661885SN/A * events on to target function executions. See comment in 1671885SN/A * system.cc for details. 1681885SN/A */ 1692158SN/A virtual Addr fixFuncEventAddr(Addr addr) = 0; 1701885SN/A 1711885SN/A /** 1721885SN/A * Add a function-based event to the given function, to be looked 1731885SN/A * up in the specified symbol table. 1741885SN/A */ 1751885SN/A template <class T> 1762989Ssaidi@eecs.umich.edu T *addFuncEvent(SymbolTable *symtab, const char *lbl) 1771885SN/A { 1781913SN/A Addr addr = 0; // initialize only to avoid compiler warning 1791885SN/A 1801885SN/A if (symtab->findAddress(lbl, addr)) { 1811885SN/A T *ev = new T(&pcEventQueue, lbl, fixFuncEventAddr(addr)); 1821885SN/A return ev; 1831885SN/A } 1841885SN/A 1851885SN/A return NULL; 1861885SN/A } 1871885SN/A 1881885SN/A /** Add a function-based event to kernel code. */ 1891885SN/A template <class T> 1902989Ssaidi@eecs.umich.edu T *addKernelFuncEvent(const char *lbl) 1911885SN/A { 1921885SN/A return addFuncEvent<T>(kernelSymtab, lbl); 1931885SN/A } 1941885SN/A 1952378SN/A#endif 19677SN/A public: 1976658Snate@binkert.org std::vector<BaseRemoteGDB *> remoteGDB; 1981070SN/A std::vector<GDBListener *> gdbListen; 1993960Sgblack@eecs.umich.edu bool breakpoint(); 2001070SN/A 2011070SN/A public: 2024762Snate@binkert.org typedef SystemParams Params; 2031070SN/A 2042158SN/A protected: 2052158SN/A Params *_params; 2061070SN/A 2072158SN/A public: 2081070SN/A System(Params *p); 2092SN/A ~System(); 2102SN/A 2111129SN/A void startup(); 2121129SN/A 2132158SN/A const Params *params() const { return (const Params *)_params; } 2142158SN/A 2151070SN/A public: 2162378SN/A 2172378SN/A#if FULL_SYSTEM 2181070SN/A /** 2191070SN/A * Returns the addess the kernel starts at. 2201070SN/A * @return address the kernel starts at 2211070SN/A */ 2221070SN/A Addr getKernelStart() const { return kernelStart; } 2231070SN/A 2241070SN/A /** 2251070SN/A * Returns the addess the kernel ends at. 2261070SN/A * @return address the kernel ends at 2271070SN/A */ 2281070SN/A Addr getKernelEnd() const { return kernelEnd; } 2291070SN/A 2301070SN/A /** 2311070SN/A * Returns the addess the entry point to the kernel code. 2321070SN/A * @return entry point of the kernel code 2331070SN/A */ 2341070SN/A Addr getKernelEntry() const { return kernelEntry; } 2351070SN/A 2362378SN/A#else 2372378SN/A 2382378SN/A Addr new_page(); 2392378SN/A 2402378SN/A#endif // FULL_SYSTEM 2412378SN/A 2425718Shsul@eecs.umich.edu int registerThreadContext(ThreadContext *tc, int assigned=-1); 2435713Shsul@eecs.umich.edu void replaceThreadContext(ThreadContext *tc, int context_id); 2441070SN/A 2451070SN/A void serialize(std::ostream &os); 2461070SN/A void unserialize(Checkpoint *cp, const std::string §ion); 2472SN/A 24877SN/A public: 2492SN/A //////////////////////////////////////////// 2502SN/A // 2512SN/A // STATIC GLOBAL SYSTEM LIST 2522SN/A // 2532SN/A //////////////////////////////////////////// 2542SN/A 2552SN/A static std::vector<System *> systemList; 2562SN/A static int numSystemsRunning; 2572SN/A 2582SN/A static void printSystems(); 2592158SN/A 2602158SN/A 2612SN/A}; 2622SN/A 2632SN/A#endif // __SYSTEM_HH__ 264