system.hh revision 7580
12SN/A/* 21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Lisa Hsu 302665Ssaidi@eecs.umich.edu * Nathan Binkert 312SN/A */ 322SN/A 332SN/A#ifndef __SYSTEM_HH__ 342SN/A#define __SYSTEM_HH__ 352SN/A 362SN/A#include <string> 3775SN/A#include <vector> 382SN/A 392439SN/A#include "base/loader/symtab.hh" 402439SN/A#include "base/misc.hh" 41603SN/A#include "base/statistics.hh" 422986Sgblack@eecs.umich.edu#include "config/full_system.hh" 43603SN/A#include "cpu/pc_event.hh" 444762Snate@binkert.org#include "enums/MemoryMode.hh" 452520SN/A#include "mem/port.hh" 464762Snate@binkert.org#include "params/System.hh" 472378SN/A#include "sim/sim_object.hh" 486658Snate@binkert.org 492378SN/A#if FULL_SYSTEM 50722SN/A#include "kern/system_events.hh" 512521SN/A#include "mem/vport.hh" 522378SN/A#endif 53312SN/A 541634SN/Aclass BaseCPU; 552680Sktlim@umich.educlass ThreadContext; 561634SN/Aclass ObjectFile; 572521SN/Aclass PhysicalMemory; 582378SN/A 592378SN/A#if FULL_SYSTEM 60803SN/Aclass Platform; 613960Sgblack@eecs.umich.edu#endif 622378SN/Aclass GDBListener; 636658Snate@binkert.orgclass BaseRemoteGDB; 642SN/A 652SN/Aclass System : public SimObject 662SN/A{ 67603SN/A public: 682901Ssaidi@eecs.umich.edu 692902Ssaidi@eecs.umich.edu static const char *MemoryModeStrings[3]; 702902Ssaidi@eecs.umich.edu 714762Snate@binkert.org Enums::MemoryMode 724762Snate@binkert.org getMemoryMode() 734762Snate@binkert.org { 744762Snate@binkert.org assert(memoryMode); 754762Snate@binkert.org return memoryMode; 764762Snate@binkert.org } 772901Ssaidi@eecs.umich.edu 782901Ssaidi@eecs.umich.edu /** Change the memory mode of the system. This should only be called by the 792901Ssaidi@eecs.umich.edu * python!! 802901Ssaidi@eecs.umich.edu * @param mode Mode to change to (atomic/timing) 812901Ssaidi@eecs.umich.edu */ 824762Snate@binkert.org void setMemoryMode(Enums::MemoryMode mode); 832901Ssaidi@eecs.umich.edu 842521SN/A PhysicalMemory *physmem; 852SN/A PCEventQueue pcEventQueue; 862SN/A 872680Sktlim@umich.edu std::vector<ThreadContext *> threadContexts; 885714Shsul@eecs.umich.edu int _numContexts; 891806SN/A 906221Snate@binkert.org ThreadContext *getThreadContext(ThreadID tid) 915713Shsul@eecs.umich.edu { 925713Shsul@eecs.umich.edu return threadContexts[tid]; 935713Shsul@eecs.umich.edu } 945713Shsul@eecs.umich.edu 955714Shsul@eecs.umich.edu int numContexts() 961806SN/A { 976227Snate@binkert.org assert(_numContexts == (int)threadContexts.size()); 985714Shsul@eecs.umich.edu return _numContexts; 991806SN/A } 100180SN/A 1016029Ssteve.reinhardt@amd.com /** Return number of running (non-halted) thread contexts in 1026029Ssteve.reinhardt@amd.com * system. These threads could be Active or Suspended. */ 1036029Ssteve.reinhardt@amd.com int numRunningContexts(); 1046029Ssteve.reinhardt@amd.com 1052378SN/A#if FULL_SYSTEM 1062378SN/A Platform *platform; 1072378SN/A uint64_t init_param; 1082378SN/A 1092520SN/A /** Port to physical memory used for writing object files into ram at 1102520SN/A * boot.*/ 1112520SN/A FunctionalPort functionalPort; 1122521SN/A VirtualPort virtPort; 1132520SN/A 1141885SN/A /** kernel symbol table */ 1151070SN/A SymbolTable *kernelSymtab; 116954SN/A 1171070SN/A /** Object pointer for the kernel code */ 1181070SN/A ObjectFile *kernel; 1191070SN/A 1201070SN/A /** Begining of kernel code */ 1211070SN/A Addr kernelStart; 1221070SN/A 1231070SN/A /** End of kernel code */ 1241070SN/A Addr kernelEnd; 1251070SN/A 1261070SN/A /** Entry point in the kernel to start at */ 1271070SN/A Addr kernelEntry; 1281070SN/A 1297580SAli.Saidi@arm.com /** Mask that should be anded for binary/symbol loading. 1307580SAli.Saidi@arm.com * This allows one two different OS requirements for the same ISA to be 1317580SAli.Saidi@arm.com * handled. Some OSes are compiled for a virtual address and need to be 1327580SAli.Saidi@arm.com * loaded into physical memory that starts at address 0, while other 1337580SAli.Saidi@arm.com * bare metal tools generate images that start at address 0. 1347580SAli.Saidi@arm.com */ 1357580SAli.Saidi@arm.com Addr loadAddrMask; 1367580SAli.Saidi@arm.com 1372378SN/A#else 1382378SN/A 1392378SN/A int page_ptr; 1402378SN/A 1414997Sgblack@eecs.umich.edu protected: 1424997Sgblack@eecs.umich.edu uint64_t next_PID; 1434997Sgblack@eecs.umich.edu 1444997Sgblack@eecs.umich.edu public: 1454997Sgblack@eecs.umich.edu uint64_t allocatePID() 1464997Sgblack@eecs.umich.edu { 1474997Sgblack@eecs.umich.edu return next_PID++; 1484997Sgblack@eecs.umich.edu } 1494997Sgblack@eecs.umich.edu 1505795Ssaidi@eecs.umich.edu /** Amount of physical memory that is still free */ 1515795Ssaidi@eecs.umich.edu Addr freeMemSize(); 1525795Ssaidi@eecs.umich.edu 1535795Ssaidi@eecs.umich.edu /** Amount of physical memory that exists */ 1545795Ssaidi@eecs.umich.edu Addr memSize(); 1555795Ssaidi@eecs.umich.edu 1562378SN/A 1572378SN/A#endif // FULL_SYSTEM 1582378SN/A 1591885SN/A protected: 1604762Snate@binkert.org Enums::MemoryMode memoryMode; 1612901Ssaidi@eecs.umich.edu 1622424SN/A#if FULL_SYSTEM 1631885SN/A /** 1641885SN/A * Fix up an address used to match PCs for hooking simulator 1651885SN/A * events on to target function executions. See comment in 1661885SN/A * system.cc for details. 1671885SN/A */ 1682158SN/A virtual Addr fixFuncEventAddr(Addr addr) = 0; 1691885SN/A 1701885SN/A /** 1711885SN/A * Add a function-based event to the given function, to be looked 1721885SN/A * up in the specified symbol table. 1731885SN/A */ 1741885SN/A template <class T> 1752989Ssaidi@eecs.umich.edu T *addFuncEvent(SymbolTable *symtab, const char *lbl) 1761885SN/A { 1771913SN/A Addr addr = 0; // initialize only to avoid compiler warning 1781885SN/A 1791885SN/A if (symtab->findAddress(lbl, addr)) { 1801885SN/A T *ev = new T(&pcEventQueue, lbl, fixFuncEventAddr(addr)); 1811885SN/A return ev; 1821885SN/A } 1831885SN/A 1841885SN/A return NULL; 1851885SN/A } 1861885SN/A 1871885SN/A /** Add a function-based event to kernel code. */ 1881885SN/A template <class T> 1892989Ssaidi@eecs.umich.edu T *addKernelFuncEvent(const char *lbl) 1901885SN/A { 1911885SN/A return addFuncEvent<T>(kernelSymtab, lbl); 1921885SN/A } 1931885SN/A 1942378SN/A#endif 19577SN/A public: 1966658Snate@binkert.org std::vector<BaseRemoteGDB *> remoteGDB; 1971070SN/A std::vector<GDBListener *> gdbListen; 1983960Sgblack@eecs.umich.edu bool breakpoint(); 1991070SN/A 2001070SN/A public: 2014762Snate@binkert.org typedef SystemParams Params; 2021070SN/A 2032158SN/A protected: 2042158SN/A Params *_params; 2051070SN/A 2062158SN/A public: 2071070SN/A System(Params *p); 2082SN/A ~System(); 2092SN/A 2101129SN/A void startup(); 2111129SN/A 2122158SN/A const Params *params() const { return (const Params *)_params; } 2132158SN/A 2141070SN/A public: 2152378SN/A 2162378SN/A#if FULL_SYSTEM 2171070SN/A /** 2181070SN/A * Returns the addess the kernel starts at. 2191070SN/A * @return address the kernel starts at 2201070SN/A */ 2211070SN/A Addr getKernelStart() const { return kernelStart; } 2221070SN/A 2231070SN/A /** 2241070SN/A * Returns the addess the kernel ends at. 2251070SN/A * @return address the kernel ends at 2261070SN/A */ 2271070SN/A Addr getKernelEnd() const { return kernelEnd; } 2281070SN/A 2291070SN/A /** 2301070SN/A * Returns the addess the entry point to the kernel code. 2311070SN/A * @return entry point of the kernel code 2321070SN/A */ 2331070SN/A Addr getKernelEntry() const { return kernelEntry; } 2341070SN/A 2352378SN/A#else 2362378SN/A 2372378SN/A Addr new_page(); 2382378SN/A 2392378SN/A#endif // FULL_SYSTEM 2402378SN/A 2415718Shsul@eecs.umich.edu int registerThreadContext(ThreadContext *tc, int assigned=-1); 2425713Shsul@eecs.umich.edu void replaceThreadContext(ThreadContext *tc, int context_id); 2431070SN/A 2441070SN/A void serialize(std::ostream &os); 2451070SN/A void unserialize(Checkpoint *cp, const std::string §ion); 2462SN/A 24777SN/A public: 2482SN/A //////////////////////////////////////////// 2492SN/A // 2502SN/A // STATIC GLOBAL SYSTEM LIST 2512SN/A // 2522SN/A //////////////////////////////////////////// 2532SN/A 2542SN/A static std::vector<System *> systemList; 2552SN/A static int numSystemsRunning; 2562SN/A 2572SN/A static void printSystems(); 2582158SN/A 2592158SN/A 2602SN/A}; 2612SN/A 2622SN/A#endif // __SYSTEM_HH__ 263