system.hh revision 4762
12SN/A/*
21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt
292665Ssaidi@eecs.umich.edu *          Lisa Hsu
302665Ssaidi@eecs.umich.edu *          Nathan Binkert
312SN/A */
322SN/A
332SN/A#ifndef __SYSTEM_HH__
342SN/A#define __SYSTEM_HH__
352SN/A
362SN/A#include <string>
3775SN/A#include <vector>
382SN/A
392439SN/A#include "base/loader/symtab.hh"
402439SN/A#include "base/misc.hh"
41603SN/A#include "base/statistics.hh"
422986Sgblack@eecs.umich.edu#include "config/full_system.hh"
43603SN/A#include "cpu/pc_event.hh"
444762Snate@binkert.org#include "enums/MemoryMode.hh"
452520SN/A#include "mem/port.hh"
464762Snate@binkert.org#include "params/System.hh"
472378SN/A#include "sim/sim_object.hh"
482378SN/A#if FULL_SYSTEM
49722SN/A#include "kern/system_events.hh"
502521SN/A#include "mem/vport.hh"
512378SN/A#endif
52312SN/A
531634SN/Aclass BaseCPU;
542680Sktlim@umich.educlass ThreadContext;
551634SN/Aclass ObjectFile;
562521SN/Aclass PhysicalMemory;
572378SN/A
582378SN/A#if FULL_SYSTEM
59803SN/Aclass Platform;
603960Sgblack@eecs.umich.edu#endif
612378SN/Aclass GDBListener;
623536Sgblack@eecs.umich.edunamespace TheISA
633536Sgblack@eecs.umich.edu{
643536Sgblack@eecs.umich.edu    class RemoteGDB;
653536Sgblack@eecs.umich.edu}
662SN/A
672SN/Aclass System : public SimObject
682SN/A{
69603SN/A  public:
702901Ssaidi@eecs.umich.edu
712902Ssaidi@eecs.umich.edu    static const char *MemoryModeStrings[3];
722902Ssaidi@eecs.umich.edu
734762Snate@binkert.org    Enums::MemoryMode
744762Snate@binkert.org    getMemoryMode()
754762Snate@binkert.org    {
764762Snate@binkert.org        assert(memoryMode);
774762Snate@binkert.org        return memoryMode;
784762Snate@binkert.org    }
792901Ssaidi@eecs.umich.edu
802901Ssaidi@eecs.umich.edu    /** Change the memory mode of the system. This should only be called by the
812901Ssaidi@eecs.umich.edu     * python!!
822901Ssaidi@eecs.umich.edu     * @param mode Mode to change to (atomic/timing)
832901Ssaidi@eecs.umich.edu     */
844762Snate@binkert.org    void setMemoryMode(Enums::MemoryMode mode);
852901Ssaidi@eecs.umich.edu
862521SN/A    PhysicalMemory *physmem;
872SN/A    PCEventQueue pcEventQueue;
882SN/A
892680Sktlim@umich.edu    std::vector<ThreadContext *> threadContexts;
901806SN/A    int numcpus;
911806SN/A
921806SN/A    int getNumCPUs()
931806SN/A    {
942680Sktlim@umich.edu        if (numcpus != threadContexts.size())
951806SN/A            panic("cpu array not fully populated!");
961806SN/A
971806SN/A        return numcpus;
981806SN/A    }
99180SN/A
1002378SN/A#if FULL_SYSTEM
1012378SN/A    Platform *platform;
1022378SN/A    uint64_t init_param;
1032378SN/A
1042520SN/A    /** Port to physical memory used for writing object files into ram at
1052520SN/A     * boot.*/
1062520SN/A    FunctionalPort functionalPort;
1072521SN/A    VirtualPort virtPort;
1082520SN/A
1091885SN/A    /** kernel symbol table */
1101070SN/A    SymbolTable *kernelSymtab;
111954SN/A
1121070SN/A    /** Object pointer for the kernel code */
1131070SN/A    ObjectFile *kernel;
1141070SN/A
1151070SN/A    /** Begining of kernel code */
1161070SN/A    Addr kernelStart;
1171070SN/A
1181070SN/A    /** End of kernel code */
1191070SN/A    Addr kernelEnd;
1201070SN/A
1211070SN/A    /** Entry point in the kernel to start at */
1221070SN/A    Addr kernelEntry;
1231070SN/A
1242378SN/A#else
1252378SN/A
1262378SN/A    int page_ptr;
1272378SN/A
1282378SN/A
1292378SN/A#endif // FULL_SYSTEM
1302378SN/A
1311885SN/A  protected:
1324762Snate@binkert.org    Enums::MemoryMode memoryMode;
1332901Ssaidi@eecs.umich.edu
1342424SN/A#if FULL_SYSTEM
1351885SN/A    /**
1361885SN/A     * Fix up an address used to match PCs for hooking simulator
1371885SN/A     * events on to target function executions.  See comment in
1381885SN/A     * system.cc for details.
1391885SN/A     */
1402158SN/A    virtual Addr fixFuncEventAddr(Addr addr) = 0;
1411885SN/A
1421885SN/A    /**
1431885SN/A     * Add a function-based event to the given function, to be looked
1441885SN/A     * up in the specified symbol table.
1451885SN/A     */
1461885SN/A    template <class T>
1472989Ssaidi@eecs.umich.edu    T *addFuncEvent(SymbolTable *symtab, const char *lbl)
1481885SN/A    {
1491913SN/A        Addr addr = 0; // initialize only to avoid compiler warning
1501885SN/A
1511885SN/A        if (symtab->findAddress(lbl, addr)) {
1521885SN/A            T *ev = new T(&pcEventQueue, lbl, fixFuncEventAddr(addr));
1531885SN/A            return ev;
1541885SN/A        }
1551885SN/A
1561885SN/A        return NULL;
1571885SN/A    }
1581885SN/A
1591885SN/A    /** Add a function-based event to kernel code. */
1601885SN/A    template <class T>
1612989Ssaidi@eecs.umich.edu    T *addKernelFuncEvent(const char *lbl)
1621885SN/A    {
1631885SN/A        return addFuncEvent<T>(kernelSymtab, lbl);
1641885SN/A    }
1651885SN/A
1662378SN/A#endif
16777SN/A  public:
1683536Sgblack@eecs.umich.edu    std::vector<TheISA::RemoteGDB *> remoteGDB;
1691070SN/A    std::vector<GDBListener *> gdbListen;
1703960Sgblack@eecs.umich.edu    bool breakpoint();
1711070SN/A
1721070SN/A  public:
1734762Snate@binkert.org    typedef SystemParams Params;
1741070SN/A
1752158SN/A  protected:
1762158SN/A    Params *_params;
1771070SN/A
1782158SN/A  public:
1791070SN/A    System(Params *p);
1802SN/A    ~System();
1812SN/A
1821129SN/A    void startup();
1831129SN/A
1842158SN/A    const Params *params() const { return (const Params *)_params; }
1852158SN/A
1861070SN/A  public:
1872378SN/A
1882378SN/A#if FULL_SYSTEM
1891070SN/A    /**
1901070SN/A     * Returns the addess the kernel starts at.
1911070SN/A     * @return address the kernel starts at
1921070SN/A     */
1931070SN/A    Addr getKernelStart() const { return kernelStart; }
1941070SN/A
1951070SN/A    /**
1961070SN/A     * Returns the addess the kernel ends at.
1971070SN/A     * @return address the kernel ends at
1981070SN/A     */
1991070SN/A    Addr getKernelEnd() const { return kernelEnd; }
2001070SN/A
2011070SN/A    /**
2021070SN/A     * Returns the addess the entry point to the kernel code.
2031070SN/A     * @return entry point of the kernel code
2041070SN/A     */
2051070SN/A    Addr getKernelEntry() const { return kernelEntry; }
2061070SN/A
2072378SN/A#else
2082378SN/A
2092378SN/A    Addr new_page();
2102378SN/A
2112378SN/A#endif // FULL_SYSTEM
2122378SN/A
2132680Sktlim@umich.edu    int registerThreadContext(ThreadContext *tc, int tcIndex);
2142680Sktlim@umich.edu    void replaceThreadContext(ThreadContext *tc, int tcIndex);
2151070SN/A
2161070SN/A    void serialize(std::ostream &os);
2171070SN/A    void unserialize(Checkpoint *cp, const std::string &section);
2182SN/A
21977SN/A  public:
2202SN/A    ////////////////////////////////////////////
2212SN/A    //
2222SN/A    // STATIC GLOBAL SYSTEM LIST
2232SN/A    //
2242SN/A    ////////////////////////////////////////////
2252SN/A
2262SN/A    static std::vector<System *> systemList;
2272SN/A    static int numSystemsRunning;
2282SN/A
2292SN/A    static void printSystems();
2302158SN/A
2312158SN/A
2322SN/A};
2332SN/A
2342SN/A#endif // __SYSTEM_HH__
235