stat_control.cc revision 2665
1695SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
3695SN/A * All rights reserved.
4695SN/A *
5695SN/A * Redistribution and use in source and binary forms, with or without
6695SN/A * modification, are permitted provided that the following conditions are
7695SN/A * met: redistributions of source code must retain the above copyright
8695SN/A * notice, this list of conditions and the following disclaimer;
9695SN/A * redistributions in binary form must reproduce the above copyright
10695SN/A * notice, this list of conditions and the following disclaimer in the
11695SN/A * documentation and/or other materials provided with the distribution;
12695SN/A * neither the name of the copyright holders nor the names of its
13695SN/A * contributors may be used to endorse or promote products derived from
14695SN/A * this software without specific prior written permission.
15695SN/A *
16695SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17695SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18695SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19695SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20695SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21695SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22695SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23695SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24695SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25695SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26695SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert
29695SN/A */
30695SN/A
31695SN/A// This file will contain default statistics for the simulator that
32695SN/A// don't really belong to a specific simulator object
33695SN/A
34695SN/A#include <fstream>
35695SN/A#include <iostream>
36695SN/A#include <list>
37695SN/A
38695SN/A#include "base/callback.hh"
39695SN/A#include "base/hostinfo.hh"
40695SN/A#include "base/statistics.hh"
41695SN/A#include "base/str.hh"
42695SN/A#include "base/time.hh"
43695SN/A#include "base/stats/output.hh"
441717SN/A#include "cpu/base.hh"
45695SN/A#include "sim/eventq.hh"
46695SN/A#include "sim/sim_object.hh"
47695SN/A#include "sim/stat_control.hh"
481696SN/A#include "sim/root.hh"
49695SN/A
50695SN/Ausing namespace std;
51695SN/A
52729SN/AStats::Formula hostInstRate;
53729SN/AStats::Formula hostTickRate;
54729SN/AStats::Value hostMemory;
55729SN/AStats::Value hostSeconds;
56695SN/A
57729SN/AStats::Value simTicks;
58729SN/AStats::Value simInsts;
59729SN/AStats::Value simFreq;
60729SN/AStats::Formula simSeconds;
61695SN/A
62729SN/Anamespace Stats {
63695SN/A
64695SN/ATime statTime(true);
65695SN/ATick startTick;
661953SN/ATick lastDump(0);
67695SN/A
68695SN/Aclass SimTicksReset : public Callback
69695SN/A{
70695SN/A  public:
71695SN/A    void process()
72695SN/A    {
73695SN/A        statTime.set();
74695SN/A        startTick = curTick;
75695SN/A    }
76695SN/A};
77695SN/A
78695SN/Adouble
79695SN/AstatElapsedTime()
80695SN/A{
81695SN/A    Time now(true);
82695SN/A    Time elapsed = now - statTime;
83695SN/A    return elapsed();
84695SN/A}
85695SN/A
861020SN/ATick
871020SN/AstatElapsedTicks()
881020SN/A{
891020SN/A    return curTick - startTick;
901020SN/A}
911020SN/A
92695SN/ASimTicksReset simTicksReset;
93695SN/A
94695SN/Avoid
95695SN/AInitSimStats()
96695SN/A{
97695SN/A    simInsts
98707SN/A        .functor(BaseCPU::numSimulatedInstructions)
99695SN/A        .name("sim_insts")
100695SN/A        .desc("Number of instructions simulated")
101695SN/A        .precision(0)
102695SN/A        .prereq(simInsts)
103695SN/A        ;
104695SN/A
105695SN/A    simSeconds
106695SN/A        .name("sim_seconds")
107695SN/A        .desc("Number of seconds simulated")
108695SN/A        ;
109695SN/A
110707SN/A    simFreq
1111609SN/A        .scalar(Clock::Frequency)
112707SN/A        .name("sim_freq")
113707SN/A        .desc("Frequency of simulated ticks")
114707SN/A        ;
115707SN/A
116695SN/A    simTicks
1171020SN/A        .functor(statElapsedTicks)
118695SN/A        .name("sim_ticks")
119695SN/A        .desc("Number of ticks simulated")
120695SN/A        ;
121695SN/A
122695SN/A    hostInstRate
123695SN/A        .name("host_inst_rate")
124695SN/A        .desc("Simulator instruction rate (inst/s)")
125695SN/A        .precision(0)
126695SN/A        .prereq(simInsts)
127695SN/A        ;
128695SN/A
129695SN/A    hostMemory
130707SN/A        .functor(memUsage)
131695SN/A        .name("host_mem_usage")
132695SN/A        .desc("Number of bytes of host memory used")
133695SN/A        .prereq(hostMemory)
134695SN/A        ;
135695SN/A
136695SN/A    hostSeconds
137707SN/A        .functor(statElapsedTime)
138695SN/A        .name("host_seconds")
139695SN/A        .desc("Real time elapsed on the host")
140695SN/A        .precision(2)
141695SN/A        ;
142695SN/A
143695SN/A    hostTickRate
144695SN/A        .name("host_tick_rate")
145695SN/A        .desc("Simulator tick rate (ticks/s)")
146695SN/A        .precision(0)
147695SN/A        ;
148695SN/A
149707SN/A    simSeconds = simTicks / simFreq;
150695SN/A    hostInstRate = simInsts / hostSeconds;
151695SN/A    hostTickRate = simTicks / hostSeconds;
152695SN/A
153695SN/A    registerResetCallback(&simTicksReset);
154695SN/A}
155695SN/A
156695SN/Aclass StatEvent : public Event
157695SN/A{
158695SN/A  protected:
159695SN/A    int flags;
160695SN/A    Tick repeat;
161695SN/A
162695SN/A  public:
163695SN/A    StatEvent(int _flags, Tick _when, Tick _repeat);
164695SN/A    virtual void process();
165695SN/A    virtual const char *description();
166695SN/A};
167695SN/A
168695SN/AStatEvent::StatEvent(int _flags, Tick _when, Tick _repeat)
169695SN/A    : Event(&mainEventQueue, Stat_Event_Pri),
170695SN/A      flags(_flags), repeat(_repeat)
171695SN/A{
172695SN/A    setFlags(AutoDelete);
173695SN/A    schedule(_when);
174695SN/A}
175695SN/A
176695SN/Aconst char *
177695SN/AStatEvent::description()
178695SN/A{
179695SN/A    return "Statistics dump and/or reset";
180695SN/A}
181695SN/A
182695SN/Avoid
183695SN/AStatEvent::process()
184695SN/A{
185729SN/A    if (flags & Stats::Dump)
186695SN/A        DumpNow();
187695SN/A
188729SN/A    if (flags & Stats::Reset)
189695SN/A        reset();
190695SN/A
191695SN/A    if (repeat)
192695SN/A        schedule(curTick + repeat);
193695SN/A}
194695SN/A
195695SN/Alist<Output *> OutputList;
196695SN/A
197695SN/Avoid
198695SN/ADumpNow()
199695SN/A{
2001953SN/A    assert(lastDump <= curTick);
2011953SN/A    if (lastDump == curTick)
2021953SN/A        return;
2031953SN/A    lastDump = curTick;
2041953SN/A
205695SN/A    list<Output *>::iterator i = OutputList.begin();
206695SN/A    list<Output *>::iterator end = OutputList.end();
207695SN/A    for (; i != end; ++i) {
208695SN/A        Output *output = *i;
209695SN/A        if (!output->valid())
210695SN/A            continue;
211695SN/A
212695SN/A        output->output();
213695SN/A    }
214695SN/A}
215695SN/A
216695SN/Avoid
217695SN/ASetupEvent(int flags, Tick when, Tick repeat)
218695SN/A{
219695SN/A    new StatEvent(flags, when, repeat);
220695SN/A}
221695SN/A
222729SN/A/* namespace Stats */ }
223695SN/A
224695SN/Aextern "C" void
225695SN/AdebugDumpStats()
226695SN/A{
227729SN/A    Stats::DumpNow();
228695SN/A}
229695SN/A
230