sim_object.cc revision 8320:c03e683e83fe 
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 *          Nathan Binkert
31 */
32
33#include <cassert>
34
35#include "base/callback.hh"
36#include "base/inifile.hh"
37#include "base/match.hh"
38#include "base/misc.hh"
39#include "base/trace.hh"
40#include "base/types.hh"
41#include "debug/Checkpoint.hh"
42#include "sim/sim_object.hh"
43#include "sim/stats.hh"
44
45using namespace std;
46
47
48////////////////////////////////////////////////////////////////////////
49//
50// SimObject member definitions
51//
52////////////////////////////////////////////////////////////////////////
53
54//
55// static list of all SimObjects, used for initialization etc.
56//
57SimObject::SimObjectList SimObject::simObjectList;
58
59//
60// SimObject constructor: used to maintain static simObjectList
61//
62SimObject::SimObject(const Params *p)
63    : EventManager(p->eventq), _params(p)
64{
65#ifdef DEBUG
66    doDebugBreak = false;
67#endif
68
69    simObjectList.push_back(this);
70    state = Running;
71}
72
73void
74SimObject::init()
75{
76}
77
78void
79SimObject::loadState(Checkpoint *cp)
80{
81    if (cp->sectionExists(name())) {
82        DPRINTF(Checkpoint, "unserializing\n");
83        unserialize(cp, name());
84    } else {
85        DPRINTF(Checkpoint, "no checkpoint section found\n");
86    }
87}
88
89void
90SimObject::initState()
91{
92}
93
94void
95SimObject::startup()
96{
97}
98
99//
100// no default statistics, so nothing to do in base implementation
101//
102void
103SimObject::regStats()
104{
105}
106
107void
108SimObject::regFormulas()
109{
110}
111
112void
113SimObject::resetStats()
114{
115}
116
117//
118// static function: serialize all SimObjects.
119//
120void
121SimObject::serializeAll(ostream &os)
122{
123    SimObjectList::reverse_iterator ri = simObjectList.rbegin();
124    SimObjectList::reverse_iterator rend = simObjectList.rend();
125
126    for (; ri != rend; ++ri) {
127        SimObject *obj = *ri;
128        obj->nameOut(os);
129        obj->serialize(os);
130   }
131}
132
133
134#ifdef DEBUG
135//
136// static function: flag which objects should have the debugger break
137//
138void
139SimObject::debugObjectBreak(const string &objs)
140{
141    SimObjectList::const_iterator i = simObjectList.begin();
142    SimObjectList::const_iterator end = simObjectList.end();
143
144    ObjectMatch match(objs);
145    for (; i != end; ++i) {
146        SimObject *obj = *i;
147        obj->doDebugBreak = match.match(obj->name());
148   }
149}
150
151void
152debugObjectBreak(const char *objs)
153{
154    SimObject::debugObjectBreak(string(objs));
155}
156#endif
157
158unsigned int
159SimObject::drain(Event *drain_event)
160{
161    state = Drained;
162    return 0;
163}
164
165void
166SimObject::resume()
167{
168    state = Running;
169}
170
171void
172SimObject::setMemoryMode(State new_mode)
173{
174    panic("setMemoryMode() should only be called on systems");
175}
176
177void
178SimObject::switchOut()
179{
180    panic("Unimplemented!");
181}
182
183void
184SimObject::takeOverFrom(BaseCPU *cpu)
185{
186    panic("Unimplemented!");
187}
188
189
190SimObject *
191SimObject::find(const char *name)
192{
193    SimObjectList::const_iterator i = simObjectList.begin();
194    SimObjectList::const_iterator end = simObjectList.end();
195
196    for (; i != end; ++i) {
197        SimObject *obj = *i;
198        if (obj->name() == name)
199            return obj;
200    }
201
202    return NULL;
203}
204