sim_object.cc revision 7534
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2010 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Steve Reinhardt 30 * Nathan Binkert 31 */ 32 33#include <cassert> 34 35#include "base/callback.hh" 36#include "base/inifile.hh" 37#include "base/match.hh" 38#include "base/misc.hh" 39#include "base/trace.hh" 40#include "base/types.hh" 41#include "sim/sim_object.hh" 42#include "sim/stats.hh" 43 44using namespace std; 45 46 47//////////////////////////////////////////////////////////////////////// 48// 49// SimObject member definitions 50// 51//////////////////////////////////////////////////////////////////////// 52 53// 54// static list of all SimObjects, used for initialization etc. 55// 56SimObject::SimObjectList SimObject::simObjectList; 57 58// 59// SimObject constructor: used to maintain static simObjectList 60// 61SimObject::SimObject(const Params *p) 62 : EventManager(p->eventq), _params(p) 63{ 64#ifdef DEBUG 65 doDebugBreak = false; 66#endif 67 68 simObjectList.push_back(this); 69 state = Running; 70} 71 72void 73SimObject::init() 74{ 75} 76 77void 78SimObject::loadState(Checkpoint *cp) 79{ 80 if (cp->sectionExists(name())) 81 unserialize(cp, name()); 82} 83 84void 85SimObject::initState() 86{ 87} 88 89void 90SimObject::startup() 91{ 92} 93 94// 95// no default statistics, so nothing to do in base implementation 96// 97void 98SimObject::regStats() 99{ 100} 101 102void 103SimObject::regFormulas() 104{ 105} 106 107void 108SimObject::resetStats() 109{ 110} 111 112// 113// static function: serialize all SimObjects. 114// 115void 116SimObject::serializeAll(ostream &os) 117{ 118 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 119 SimObjectList::reverse_iterator rend = simObjectList.rend(); 120 121 for (; ri != rend; ++ri) { 122 SimObject *obj = *ri; 123 obj->nameOut(os); 124 obj->serialize(os); 125 } 126} 127 128void 129SimObject::unserializeAll(Checkpoint *cp) 130{ 131 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 132 SimObjectList::reverse_iterator rend = simObjectList.rend(); 133 134 for (; ri != rend; ++ri) { 135 SimObject *obj = *ri; 136 DPRINTFR(Config, "Unserializing '%s'\n", 137 obj->name()); 138 if(cp->sectionExists(obj->name())) 139 obj->unserialize(cp, obj->name()); 140 else 141 warn("Not unserializing '%s': no section found in checkpoint.\n", 142 obj->name()); 143 } 144} 145 146 147 148#ifdef DEBUG 149// 150// static function: flag which objects should have the debugger break 151// 152void 153SimObject::debugObjectBreak(const string &objs) 154{ 155 SimObjectList::const_iterator i = simObjectList.begin(); 156 SimObjectList::const_iterator end = simObjectList.end(); 157 158 ObjectMatch match(objs); 159 for (; i != end; ++i) { 160 SimObject *obj = *i; 161 obj->doDebugBreak = match.match(obj->name()); 162 } 163} 164 165void 166debugObjectBreak(const char *objs) 167{ 168 SimObject::debugObjectBreak(string(objs)); 169} 170#endif 171 172unsigned int 173SimObject::drain(Event *drain_event) 174{ 175 state = Drained; 176 return 0; 177} 178 179void 180SimObject::resume() 181{ 182 state = Running; 183} 184 185void 186SimObject::setMemoryMode(State new_mode) 187{ 188 panic("setMemoryMode() should only be called on systems"); 189} 190 191void 192SimObject::switchOut() 193{ 194 panic("Unimplemented!"); 195} 196 197void 198SimObject::takeOverFrom(BaseCPU *cpu) 199{ 200 panic("Unimplemented!"); 201} 202 203 204SimObject * 205SimObject::find(const char *name) 206{ 207 SimObjectList::const_iterator i = simObjectList.begin(); 208 SimObjectList::const_iterator end = simObjectList.end(); 209 210 for (; i != end; ++i) { 211 SimObject *obj = *i; 212 if (obj->name() == name) 213 return obj; 214 } 215 216 return NULL; 217} 218