sim_object.cc revision 4762
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32#include <assert.h> 33 34#include "base/callback.hh" 35#include "base/inifile.hh" 36#include "base/match.hh" 37#include "base/misc.hh" 38#include "base/trace.hh" 39#include "base/stats/events.hh" 40#include "sim/host.hh" 41#include "sim/sim_object.hh" 42#include "sim/stats.hh" 43 44using namespace std; 45 46 47//////////////////////////////////////////////////////////////////////// 48// 49// SimObject member definitions 50// 51//////////////////////////////////////////////////////////////////////// 52 53// 54// static list of all SimObjects, used for initialization etc. 55// 56SimObject::SimObjectList SimObject::simObjectList; 57 58// 59// SimObject constructor: used to maintain static simObjectList 60// 61SimObject::SimObject(const Params *p) 62 : _params(p) 63{ 64#ifdef DEBUG 65 doDebugBreak = false; 66#endif 67 68 simObjectList.push_back(this); 69 state = Running; 70} 71 72SimObjectParams * 73makeParams(const string &name) 74{ 75 SimObjectParams *params = new SimObjectParams; 76 params->name = name; 77 78 return params; 79} 80 81SimObject::SimObject(const string &_name) 82 : _params(makeParams(_name)) 83{ 84#ifdef DEBUG 85 doDebugBreak = false; 86#endif 87 88 simObjectList.push_back(this); 89 state = Running; 90} 91 92void 93SimObject::init() 94{ 95} 96 97// 98// no default statistics, so nothing to do in base implementation 99// 100void 101SimObject::regStats() 102{ 103} 104 105void 106SimObject::regFormulas() 107{ 108} 109 110void 111SimObject::resetStats() 112{ 113} 114 115// 116// static function: 117// call regStats() on all SimObjects and then regFormulas() on all 118// SimObjects. 119// 120struct SimObjectResetCB : public Callback 121{ 122 virtual void process() { SimObject::resetAllStats(); } 123}; 124 125namespace { 126 static SimObjectResetCB StatResetCB; 127} 128 129void 130SimObject::regAllStats() 131{ 132 SimObjectList::iterator i; 133 SimObjectList::iterator end = simObjectList.end(); 134 135 /** 136 * @todo change cprintfs to DPRINTFs 137 */ 138 for (i = simObjectList.begin(); i != end; ++i) { 139#ifdef STAT_DEBUG 140 cprintf("registering stats for %s\n", (*i)->name()); 141#endif 142 (*i)->regStats(); 143 } 144 145 for (i = simObjectList.begin(); i != end; ++i) { 146#ifdef STAT_DEBUG 147 cprintf("registering formulas for %s\n", (*i)->name()); 148#endif 149 (*i)->regFormulas(); 150 } 151 152 Stats::registerResetCallback(&StatResetCB); 153} 154 155// 156// static function: call init() on all SimObjects. 157// 158void 159SimObject::initAll() 160{ 161 SimObjectList::iterator i = simObjectList.begin(); 162 SimObjectList::iterator end = simObjectList.end(); 163 164 for (; i != end; ++i) { 165 SimObject *obj = *i; 166 obj->init(); 167 } 168} 169 170// 171// static function: call resetStats() on all SimObjects. 172// 173void 174SimObject::resetAllStats() 175{ 176 SimObjectList::iterator i = simObjectList.begin(); 177 SimObjectList::iterator end = simObjectList.end(); 178 179 for (; i != end; ++i) { 180 SimObject *obj = *i; 181 obj->resetStats(); 182 } 183} 184 185// 186// static function: serialize all SimObjects. 187// 188void 189SimObject::serializeAll(ostream &os) 190{ 191 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 192 SimObjectList::reverse_iterator rend = simObjectList.rend(); 193 194 for (; ri != rend; ++ri) { 195 SimObject *obj = *ri; 196 obj->nameOut(os); 197 obj->serialize(os); 198 } 199} 200 201void 202SimObject::unserializeAll(Checkpoint *cp) 203{ 204 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 205 SimObjectList::reverse_iterator rend = simObjectList.rend(); 206 207 for (; ri != rend; ++ri) { 208 SimObject *obj = *ri; 209 DPRINTFR(Config, "Unserializing '%s'\n", 210 obj->name()); 211 if(cp->sectionExists(obj->name())) 212 obj->unserialize(cp, obj->name()); 213 else 214 warn("Not unserializing '%s': no section found in checkpoint.\n", 215 obj->name()); 216 } 217} 218 219#ifdef DEBUG 220// 221// static function: flag which objects should have the debugger break 222// 223void 224SimObject::debugObjectBreak(const string &objs) 225{ 226 SimObjectList::const_iterator i = simObjectList.begin(); 227 SimObjectList::const_iterator end = simObjectList.end(); 228 229 ObjectMatch match(objs); 230 for (; i != end; ++i) { 231 SimObject *obj = *i; 232 obj->doDebugBreak = match.match(obj->name()); 233 } 234} 235 236void 237debugObjectBreak(const char *objs) 238{ 239 SimObject::debugObjectBreak(string(objs)); 240} 241#endif 242 243void 244SimObject::recordEvent(const std::string &stat) 245{ 246 Stats::recordEvent(stat); 247} 248 249unsigned int 250SimObject::drain(Event *drain_event) 251{ 252 state = Drained; 253 return 0; 254} 255 256void 257SimObject::resume() 258{ 259 state = Running; 260} 261 262void 263SimObject::setMemoryMode(State new_mode) 264{ 265 panic("setMemoryMode() should only be called on systems"); 266} 267 268void 269SimObject::switchOut() 270{ 271 panic("Unimplemented!"); 272} 273 274void 275SimObject::takeOverFrom(BaseCPU *cpu) 276{ 277 panic("Unimplemented!"); 278} 279