sim_object.cc revision 13781:280e5206fd97
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2010 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Steve Reinhardt 30 * Nathan Binkert 31 */ 32 33#include "sim/sim_object.hh" 34 35#include "base/logging.hh" 36#include "base/match.hh" 37#include "base/trace.hh" 38#include "debug/Checkpoint.hh" 39#include "sim/probe/probe.hh" 40 41using namespace std; 42 43 44//////////////////////////////////////////////////////////////////////// 45// 46// SimObject member definitions 47// 48//////////////////////////////////////////////////////////////////////// 49 50// 51// static list of all SimObjects, used for initialization etc. 52// 53SimObject::SimObjectList SimObject::simObjectList; 54 55// 56// SimObject constructor: used to maintain static simObjectList 57// 58SimObject::SimObject(const Params *p) 59 : EventManager(getEventQueue(p->eventq_index)), _params(p) 60{ 61#ifdef DEBUG 62 doDebugBreak = false; 63#endif 64 simObjectList.push_back(this); 65 probeManager = new ProbeManager(this); 66} 67 68SimObject::~SimObject() 69{ 70 delete probeManager; 71} 72 73void 74SimObject::init() 75{ 76} 77 78void 79SimObject::loadState(CheckpointIn &cp) 80{ 81 if (cp.sectionExists(name())) { 82 DPRINTF(Checkpoint, "unserializing\n"); 83 // This works despite name() returning a fully qualified name 84 // since we are at the top level. 85 unserializeSection(cp, name()); 86 } else { 87 DPRINTF(Checkpoint, "no checkpoint section found\n"); 88 } 89} 90 91void 92SimObject::initState() 93{ 94} 95 96void 97SimObject::startup() 98{ 99} 100 101// 102// no default statistics, so nothing to do in base implementation 103// 104void 105SimObject::regStats() 106{ 107} 108 109void 110SimObject::resetStats() 111{ 112} 113 114/** 115 * No probe points by default, so do nothing in base. 116 */ 117void 118SimObject::regProbePoints() 119{ 120} 121 122/** 123 * No probe listeners by default, so do nothing in base. 124 */ 125void 126SimObject::regProbeListeners() 127{ 128} 129 130ProbeManager * 131SimObject::getProbeManager() 132{ 133 return probeManager; 134} 135 136Port & 137SimObject::getPort(const std::string &if_name, PortID idx) 138{ 139 fatal("%s does not have any port named %s\n", name(), if_name); 140} 141 142// 143// static function: serialize all SimObjects. 144// 145void 146SimObject::serializeAll(CheckpointOut &cp) 147{ 148 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 149 SimObjectList::reverse_iterator rend = simObjectList.rend(); 150 151 for (; ri != rend; ++ri) { 152 SimObject *obj = *ri; 153 // This works despite name() returning a fully qualified name 154 // since we are at the top level. 155 obj->serializeSection(cp, obj->name()); 156 } 157} 158 159 160#ifdef DEBUG 161// 162// static function: flag which objects should have the debugger break 163// 164void 165SimObject::debugObjectBreak(const string &objs) 166{ 167 SimObjectList::const_iterator i = simObjectList.begin(); 168 SimObjectList::const_iterator end = simObjectList.end(); 169 170 ObjectMatch match(objs); 171 for (; i != end; ++i) { 172 SimObject *obj = *i; 173 obj->doDebugBreak = match.match(obj->name()); 174 } 175} 176 177void 178debugObjectBreak(const char *objs) 179{ 180 SimObject::debugObjectBreak(string(objs)); 181} 182#endif 183 184SimObject * 185SimObject::find(const char *name) 186{ 187 SimObjectList::const_iterator i = simObjectList.begin(); 188 SimObjectList::const_iterator end = simObjectList.end(); 189 190 for (; i != end; ++i) { 191 SimObject *obj = *i; 192 if (obj->name() == name) 193 return obj; 194 } 195 196 return NULL; 197} 198