sim_object.cc revision 10905:a6ca6831e775 
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 *          Nathan Binkert
31 */
32
33#include <cassert>
34
35#include "base/callback.hh"
36#include "base/inifile.hh"
37#include "base/match.hh"
38#include "base/misc.hh"
39#include "base/trace.hh"
40#include "base/types.hh"
41#include "debug/Checkpoint.hh"
42#include "sim/probe/probe.hh"
43#include "sim/sim_object.hh"
44#include "sim/stats.hh"
45
46using namespace std;
47
48
49////////////////////////////////////////////////////////////////////////
50//
51// SimObject member definitions
52//
53////////////////////////////////////////////////////////////////////////
54
55//
56// static list of all SimObjects, used for initialization etc.
57//
58SimObject::SimObjectList SimObject::simObjectList;
59
60//
61// SimObject constructor: used to maintain static simObjectList
62//
63SimObject::SimObject(const Params *p)
64    : EventManager(getEventQueue(p->eventq_index)), _params(p)
65{
66#ifdef DEBUG
67    doDebugBreak = false;
68#endif
69    simObjectList.push_back(this);
70    probeManager = new ProbeManager(this);
71}
72
73SimObject::~SimObject()
74{
75    delete probeManager;
76}
77
78void
79SimObject::init()
80{
81}
82
83void
84SimObject::loadState(CheckpointIn &cp)
85{
86    if (cp.sectionExists(name())) {
87        DPRINTF(Checkpoint, "unserializing\n");
88        // This works despite name() returning a fully qualified name
89        // since we are at the top level.
90        unserializeSection(cp, name());
91    } else {
92        DPRINTF(Checkpoint, "no checkpoint section found\n");
93    }
94}
95
96void
97SimObject::initState()
98{
99}
100
101void
102SimObject::startup()
103{
104}
105
106//
107// no default statistics, so nothing to do in base implementation
108//
109void
110SimObject::regStats()
111{
112}
113
114void
115SimObject::resetStats()
116{
117}
118
119/**
120 * No probe points by default, so do nothing in base.
121 */
122void
123SimObject::regProbePoints()
124{
125}
126
127/**
128 * No probe listeners by default, so do nothing in base.
129 */
130void
131SimObject::regProbeListeners()
132{
133}
134
135ProbeManager *
136SimObject::getProbeManager()
137{
138    return probeManager;
139}
140
141//
142// static function: serialize all SimObjects.
143//
144void
145SimObject::serializeAll(CheckpointOut &cp)
146{
147    SimObjectList::reverse_iterator ri = simObjectList.rbegin();
148    SimObjectList::reverse_iterator rend = simObjectList.rend();
149
150    for (; ri != rend; ++ri) {
151        SimObject *obj = *ri;
152        // This works despite name() returning a fully qualified name
153        // since we are at the top level.
154        obj->serializeSectionOld(cp, obj->name());
155   }
156}
157
158
159#ifdef DEBUG
160//
161// static function: flag which objects should have the debugger break
162//
163void
164SimObject::debugObjectBreak(const string &objs)
165{
166    SimObjectList::const_iterator i = simObjectList.begin();
167    SimObjectList::const_iterator end = simObjectList.end();
168
169    ObjectMatch match(objs);
170    for (; i != end; ++i) {
171        SimObject *obj = *i;
172        obj->doDebugBreak = match.match(obj->name());
173   }
174}
175
176void
177debugObjectBreak(const char *objs)
178{
179    SimObject::debugObjectBreak(string(objs));
180}
181#endif
182
183unsigned int
184SimObject::drain(DrainManager *drain_manager)
185{
186    setDrainState(Drained);
187    return 0;
188}
189
190
191SimObject *
192SimObject::find(const char *name)
193{
194    SimObjectList::const_iterator i = simObjectList.begin();
195    SimObjectList::const_iterator end = simObjectList.end();
196
197    for (; i != end; ++i) {
198        SimObject *obj = *i;
199        if (obj->name() == name)
200            return obj;
201    }
202
203    return NULL;
204}
205