sim_object.cc revision 9342
12SN/A/*
21762SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan
37534Ssteve.reinhardt@amd.com * Copyright (c) 2010 Advanced Micro Devices, Inc.
42SN/A * All rights reserved.
52SN/A *
62SN/A * Redistribution and use in source and binary forms, with or without
72SN/A * modification, are permitted provided that the following conditions are
82SN/A * met: redistributions of source code must retain the above copyright
92SN/A * notice, this list of conditions and the following disclaimer;
102SN/A * redistributions in binary form must reproduce the above copyright
112SN/A * notice, this list of conditions and the following disclaimer in the
122SN/A * documentation and/or other materials provided with the distribution;
132SN/A * neither the name of the copyright holders nor the names of its
142SN/A * contributors may be used to endorse or promote products derived from
152SN/A * this software without specific prior written permission.
162SN/A *
172SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
232SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
242SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
252SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
262SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282665Ssaidi@eecs.umich.edu *
292665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt
302665Ssaidi@eecs.umich.edu *          Nathan Binkert
312SN/A */
322SN/A
336216Snate@binkert.org#include <cassert>
342SN/A
35330SN/A#include "base/callback.hh"
3656SN/A#include "base/inifile.hh"
371031SN/A#include "base/match.hh"
38330SN/A#include "base/misc.hh"
39330SN/A#include "base/trace.hh"
406214Snate@binkert.org#include "base/types.hh"
418320Ssteve.reinhardt@amd.com#include "debug/Checkpoint.hh"
42330SN/A#include "sim/sim_object.hh"
43695SN/A#include "sim/stats.hh"
442SN/A
452SN/Ausing namespace std;
462SN/A
472SN/A
482SN/A////////////////////////////////////////////////////////////////////////
492SN/A//
502SN/A// SimObject member definitions
512SN/A//
522SN/A////////////////////////////////////////////////////////////////////////
532SN/A
542SN/A//
552SN/A// static list of all SimObjects, used for initialization etc.
562SN/A//
572SN/ASimObject::SimObjectList SimObject::simObjectList;
582SN/A
592SN/A//
602SN/A// SimObject constructor: used to maintain static simObjectList
612SN/A//
624762Snate@binkert.orgSimObject::SimObject(const Params *p)
635605Snate@binkert.org    : EventManager(p->eventq), _params(p)
642SN/A{
651031SN/A#ifdef DEBUG
661031SN/A    doDebugBreak = false;
671031SN/A#endif
681031SN/A
691553SN/A    simObjectList.push_back(this);
701553SN/A}
711553SN/A
72465SN/Avoid
73465SN/ASimObject::init()
74465SN/A{
75465SN/A}
76465SN/A
777492Ssteve.reinhardt@amd.comvoid
787532Ssteve.reinhardt@amd.comSimObject::loadState(Checkpoint *cp)
797532Ssteve.reinhardt@amd.com{
808320Ssteve.reinhardt@amd.com    if (cp->sectionExists(name())) {
818320Ssteve.reinhardt@amd.com        DPRINTF(Checkpoint, "unserializing\n");
827532Ssteve.reinhardt@amd.com        unserialize(cp, name());
838320Ssteve.reinhardt@amd.com    } else {
848320Ssteve.reinhardt@amd.com        DPRINTF(Checkpoint, "no checkpoint section found\n");
858320Ssteve.reinhardt@amd.com    }
867532Ssteve.reinhardt@amd.com}
877532Ssteve.reinhardt@amd.com
887532Ssteve.reinhardt@amd.comvoid
897532Ssteve.reinhardt@amd.comSimObject::initState()
907532Ssteve.reinhardt@amd.com{
917532Ssteve.reinhardt@amd.com}
927532Ssteve.reinhardt@amd.com
937532Ssteve.reinhardt@amd.comvoid
947492Ssteve.reinhardt@amd.comSimObject::startup()
957492Ssteve.reinhardt@amd.com{
967492Ssteve.reinhardt@amd.com}
977492Ssteve.reinhardt@amd.com
982SN/A//
992SN/A// no default statistics, so nothing to do in base implementation
1002SN/A//
1012SN/Avoid
1022SN/ASimObject::regStats()
1032SN/A{
1042SN/A}
1052SN/A
1062SN/Avoid
107330SN/ASimObject::resetStats()
108330SN/A{
109330SN/A}
110330SN/A
1112SN/A//
112395SN/A// static function: serialize all SimObjects.
113395SN/A//
114395SN/Avoid
1159196SAndreas.Sandberg@arm.comSimObject::serializeAll(std::ostream &os)
116395SN/A{
117573SN/A    SimObjectList::reverse_iterator ri = simObjectList.rbegin();
118573SN/A    SimObjectList::reverse_iterator rend = simObjectList.rend();
119395SN/A
120573SN/A    for (; ri != rend; ++ri) {
121573SN/A        SimObject *obj = *ri;
122395SN/A        obj->nameOut(os);
123395SN/A        obj->serialize(os);
124395SN/A   }
125395SN/A}
126843SN/A
1277492Ssteve.reinhardt@amd.com
1281031SN/A#ifdef DEBUG
1291031SN/A//
1301031SN/A// static function: flag which objects should have the debugger break
1311031SN/A//
1321031SN/Avoid
1331031SN/ASimObject::debugObjectBreak(const string &objs)
1341031SN/A{
1351031SN/A    SimObjectList::const_iterator i = simObjectList.begin();
1361031SN/A    SimObjectList::const_iterator end = simObjectList.end();
1371031SN/A
1381031SN/A    ObjectMatch match(objs);
1391031SN/A    for (; i != end; ++i) {
1401031SN/A        SimObject *obj = *i;
1411031SN/A        obj->doDebugBreak = match.match(obj->name());
1421031SN/A   }
1431031SN/A}
1441031SN/A
1451031SN/Avoid
1461031SN/AdebugObjectBreak(const char *objs)
1471031SN/A{
1481031SN/A    SimObject::debugObjectBreak(string(objs));
1491031SN/A}
1501031SN/A#endif
1511031SN/A
1522901Ssaidi@eecs.umich.eduunsigned int
1539342SAndreas.Sandberg@arm.comSimObject::drain(DrainManager *drain_manager)
1542797Sktlim@umich.edu{
1559342SAndreas.Sandberg@arm.com    setDrainState(Drained);
1562901Ssaidi@eecs.umich.edu    return 0;
1572797Sktlim@umich.edu}
1582797Sktlim@umich.edu
1592797Sktlim@umich.edu
1605314Sstever@gmail.comSimObject *
1615314Sstever@gmail.comSimObject::find(const char *name)
1625314Sstever@gmail.com{
1635314Sstever@gmail.com    SimObjectList::const_iterator i = simObjectList.begin();
1645314Sstever@gmail.com    SimObjectList::const_iterator end = simObjectList.end();
1655314Sstever@gmail.com
1665314Sstever@gmail.com    for (; i != end; ++i) {
1675314Sstever@gmail.com        SimObject *obj = *i;
1685314Sstever@gmail.com        if (obj->name() == name)
1695314Sstever@gmail.com            return obj;
1705314Sstever@gmail.com    }
1715314Sstever@gmail.com
1725314Sstever@gmail.com    return NULL;
1735314Sstever@gmail.com}
174