sim_object.cc revision 11793
12SN/A/*
21762SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan
37534Ssteve.reinhardt@amd.com * Copyright (c) 2010 Advanced Micro Devices, Inc.
42SN/A * All rights reserved.
52SN/A *
62SN/A * Redistribution and use in source and binary forms, with or without
72SN/A * modification, are permitted provided that the following conditions are
82SN/A * met: redistributions of source code must retain the above copyright
92SN/A * notice, this list of conditions and the following disclaimer;
102SN/A * redistributions in binary form must reproduce the above copyright
112SN/A * notice, this list of conditions and the following disclaimer in the
122SN/A * documentation and/or other materials provided with the distribution;
132SN/A * neither the name of the copyright holders nor the names of its
142SN/A * contributors may be used to endorse or promote products derived from
152SN/A * this software without specific prior written permission.
162SN/A *
172SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
232SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
242SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
252SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
262SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282665Ssaidi@eecs.umich.edu *
292665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt
302665Ssaidi@eecs.umich.edu *          Nathan Binkert
312SN/A */
322SN/A
3311793Sbrandon.potter@amd.com#include "sim/sim_object.hh"
3411793Sbrandon.potter@amd.com
356216Snate@binkert.org#include <cassert>
362SN/A
37330SN/A#include "base/callback.hh"
3856SN/A#include "base/inifile.hh"
391031SN/A#include "base/match.hh"
40330SN/A#include "base/misc.hh"
41330SN/A#include "base/trace.hh"
426214Snate@binkert.org#include "base/types.hh"
438320Ssteve.reinhardt@amd.com#include "debug/Checkpoint.hh"
4410023Smatt.horsnell@ARM.com#include "sim/probe/probe.hh"
45695SN/A#include "sim/stats.hh"
462SN/A
472SN/Ausing namespace std;
482SN/A
492SN/A
502SN/A////////////////////////////////////////////////////////////////////////
512SN/A//
522SN/A// SimObject member definitions
532SN/A//
542SN/A////////////////////////////////////////////////////////////////////////
552SN/A
562SN/A//
572SN/A// static list of all SimObjects, used for initialization etc.
582SN/A//
592SN/ASimObject::SimObjectList SimObject::simObjectList;
602SN/A
612SN/A//
622SN/A// SimObject constructor: used to maintain static simObjectList
632SN/A//
644762Snate@binkert.orgSimObject::SimObject(const Params *p)
659983Sstever@gmail.com    : EventManager(getEventQueue(p->eventq_index)), _params(p)
662SN/A{
671031SN/A#ifdef DEBUG
681031SN/A    doDebugBreak = false;
691031SN/A#endif
701553SN/A    simObjectList.push_back(this);
7110023Smatt.horsnell@ARM.com    probeManager = new ProbeManager(this);
721553SN/A}
731553SN/A
7410422Sandreas.hansson@arm.comSimObject::~SimObject()
7510422Sandreas.hansson@arm.com{
7610422Sandreas.hansson@arm.com    delete probeManager;
7710422Sandreas.hansson@arm.com}
7810422Sandreas.hansson@arm.com
79465SN/Avoid
80465SN/ASimObject::init()
81465SN/A{
82465SN/A}
83465SN/A
847492Ssteve.reinhardt@amd.comvoid
8510905Sandreas.sandberg@arm.comSimObject::loadState(CheckpointIn &cp)
867532Ssteve.reinhardt@amd.com{
8710905Sandreas.sandberg@arm.com    if (cp.sectionExists(name())) {
888320Ssteve.reinhardt@amd.com        DPRINTF(Checkpoint, "unserializing\n");
8910905Sandreas.sandberg@arm.com        // This works despite name() returning a fully qualified name
9010905Sandreas.sandberg@arm.com        // since we are at the top level.
9110905Sandreas.sandberg@arm.com        unserializeSection(cp, name());
928320Ssteve.reinhardt@amd.com    } else {
938320Ssteve.reinhardt@amd.com        DPRINTF(Checkpoint, "no checkpoint section found\n");
948320Ssteve.reinhardt@amd.com    }
957532Ssteve.reinhardt@amd.com}
967532Ssteve.reinhardt@amd.com
977532Ssteve.reinhardt@amd.comvoid
987532Ssteve.reinhardt@amd.comSimObject::initState()
997532Ssteve.reinhardt@amd.com{
1007532Ssteve.reinhardt@amd.com}
1017532Ssteve.reinhardt@amd.com
1027532Ssteve.reinhardt@amd.comvoid
1037492Ssteve.reinhardt@amd.comSimObject::startup()
1047492Ssteve.reinhardt@amd.com{
1057492Ssteve.reinhardt@amd.com}
1067492Ssteve.reinhardt@amd.com
1072SN/A//
1082SN/A// no default statistics, so nothing to do in base implementation
1092SN/A//
1102SN/Avoid
1112SN/ASimObject::regStats()
1122SN/A{
1132SN/A}
1142SN/A
1152SN/Avoid
116330SN/ASimObject::resetStats()
117330SN/A{
118330SN/A}
119330SN/A
12010023Smatt.horsnell@ARM.com/**
12110023Smatt.horsnell@ARM.com * No probe points by default, so do nothing in base.
12210023Smatt.horsnell@ARM.com */
12310023Smatt.horsnell@ARM.comvoid
12410023Smatt.horsnell@ARM.comSimObject::regProbePoints()
12510023Smatt.horsnell@ARM.com{
12610023Smatt.horsnell@ARM.com}
12710023Smatt.horsnell@ARM.com
12810023Smatt.horsnell@ARM.com/**
12910023Smatt.horsnell@ARM.com * No probe listeners by default, so do nothing in base.
13010023Smatt.horsnell@ARM.com */
13110023Smatt.horsnell@ARM.comvoid
13210023Smatt.horsnell@ARM.comSimObject::regProbeListeners()
13310023Smatt.horsnell@ARM.com{
13410023Smatt.horsnell@ARM.com}
13510023Smatt.horsnell@ARM.com
13610023Smatt.horsnell@ARM.comProbeManager *
13710023Smatt.horsnell@ARM.comSimObject::getProbeManager()
13810023Smatt.horsnell@ARM.com{
13910023Smatt.horsnell@ARM.com    return probeManager;
14010023Smatt.horsnell@ARM.com}
14110023Smatt.horsnell@ARM.com
1422SN/A//
143395SN/A// static function: serialize all SimObjects.
144395SN/A//
145395SN/Avoid
14610905Sandreas.sandberg@arm.comSimObject::serializeAll(CheckpointOut &cp)
147395SN/A{
148573SN/A    SimObjectList::reverse_iterator ri = simObjectList.rbegin();
149573SN/A    SimObjectList::reverse_iterator rend = simObjectList.rend();
150395SN/A
151573SN/A    for (; ri != rend; ++ri) {
152573SN/A        SimObject *obj = *ri;
15310905Sandreas.sandberg@arm.com        // This works despite name() returning a fully qualified name
15410905Sandreas.sandberg@arm.com        // since we are at the top level.
15511240Sandreas.sandberg@arm.com        obj->serializeSection(cp, obj->name());
156395SN/A   }
157395SN/A}
158843SN/A
1597492Ssteve.reinhardt@amd.com
1601031SN/A#ifdef DEBUG
1611031SN/A//
1621031SN/A// static function: flag which objects should have the debugger break
1631031SN/A//
1641031SN/Avoid
1651031SN/ASimObject::debugObjectBreak(const string &objs)
1661031SN/A{
1671031SN/A    SimObjectList::const_iterator i = simObjectList.begin();
1681031SN/A    SimObjectList::const_iterator end = simObjectList.end();
1691031SN/A
1701031SN/A    ObjectMatch match(objs);
1711031SN/A    for (; i != end; ++i) {
1721031SN/A        SimObject *obj = *i;
1731031SN/A        obj->doDebugBreak = match.match(obj->name());
1741031SN/A   }
1751031SN/A}
1761031SN/A
1771031SN/Avoid
1781031SN/AdebugObjectBreak(const char *objs)
1791031SN/A{
1801031SN/A    SimObject::debugObjectBreak(string(objs));
1811031SN/A}
1821031SN/A#endif
1831031SN/A
1845314Sstever@gmail.comSimObject *
1855314Sstever@gmail.comSimObject::find(const char *name)
1865314Sstever@gmail.com{
1875314Sstever@gmail.com    SimObjectList::const_iterator i = simObjectList.begin();
1885314Sstever@gmail.com    SimObjectList::const_iterator end = simObjectList.end();
1895314Sstever@gmail.com
1905314Sstever@gmail.com    for (; i != end; ++i) {
1915314Sstever@gmail.com        SimObject *obj = *i;
1925314Sstever@gmail.com        if (obj->name() == name)
1935314Sstever@gmail.com            return obj;
1945314Sstever@gmail.com    }
1955314Sstever@gmail.com
1965314Sstever@gmail.com    return NULL;
1975314Sstever@gmail.com}
198