sim_events.cc revision 3144
12SN/A/*
21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert
292SN/A */
302SN/A
312SN/A#include <string>
322SN/A
33601SN/A#include "base/callback.hh"
34601SN/A#include "base/hostinfo.hh"
35601SN/A#include "sim/eventq.hh"
3685SN/A#include "sim/param.hh"
3756SN/A#include "sim/sim_events.hh"
3856SN/A#include "sim/sim_exit.hh"
391127SN/A#include "sim/startup.hh"
40695SN/A#include "sim/stats.hh"
412SN/A
422SN/Ausing namespace std;
432SN/A
442SN/A//
452SN/A// handle termination event
462SN/A//
472SN/Avoid
482667Sstever@eecs.umich.eduSimLoopExitEvent::process()
492SN/A{
502667Sstever@eecs.umich.edu    // if this got scheduled on a different queue (e.g. the committed
512667Sstever@eecs.umich.edu    // instruction queue) then make a corresponding event on the main
522667Sstever@eecs.umich.edu    // queue.
532667Sstever@eecs.umich.edu    if (theQueue() != &mainEventQueue) {
542667Sstever@eecs.umich.edu        exitSimLoop(cause, code);
552SN/A        delete this;
562SN/A    }
572667Sstever@eecs.umich.edu
582667Sstever@eecs.umich.edu    // otherwise do nothing... the IsExitEvent flag takes care of
592667Sstever@eecs.umich.edu    // exiting the simulation loop and returning this object to Python
603144Shsul@eecs.umich.edu
613144Shsul@eecs.umich.edu    // but if you are doing this on intervals, don't forget to make another
623144Shsul@eecs.umich.edu    if (repeat) {
633144Shsul@eecs.umich.edu        schedule(curTick + repeat);
643144Shsul@eecs.umich.edu    }
652SN/A}
662SN/A
672SN/A
682SN/Aconst char *
692667Sstever@eecs.umich.eduSimLoopExitEvent::description()
702SN/A{
712667Sstever@eecs.umich.edu    return "simulation loop exit";
722667Sstever@eecs.umich.edu}
732667Sstever@eecs.umich.edu
743144Shsul@eecs.umich.eduSimLoopExitEvent *
753144Shsul@eecs.umich.eduschedExitSimLoop(const std::string &message, Tick when, Tick repeat,
763144Shsul@eecs.umich.edu                 EventQueue *q, int exit_code)
772667Sstever@eecs.umich.edu{
783144Shsul@eecs.umich.edu    if (q == NULL)
793144Shsul@eecs.umich.edu        q = &mainEventQueue;
803144Shsul@eecs.umich.edu
813144Shsul@eecs.umich.edu    return new SimLoopExitEvent(q, when, repeat, message, exit_code);
822667Sstever@eecs.umich.edu}
832667Sstever@eecs.umich.edu
842667Sstever@eecs.umich.eduvoid
852667Sstever@eecs.umich.eduexitSimLoop(const std::string &message, int exit_code)
862667Sstever@eecs.umich.edu{
873144Shsul@eecs.umich.edu    schedExitSimLoop(message, curTick, 0, NULL, exit_code);
882SN/A}
892SN/A
902797Sktlim@umich.eduvoid
912839Sktlim@umich.eduCountedDrainEvent::process()
922797Sktlim@umich.edu{
932797Sktlim@umich.edu    if (--count == 0) {
942839Sktlim@umich.edu        exitSimLoop("Finished drain");
952797Sktlim@umich.edu    }
962797Sktlim@umich.edu}
972797Sktlim@umich.edu
982SN/A//
992SN/A// constructor: automatically schedules at specified time
1002SN/A//
1012SN/ACountedExitEvent::CountedExitEvent(EventQueue *q, const std::string &_cause,
1022SN/A                                   Tick _when, int &_downCounter)
103396SN/A    : Event(q, Sim_Exit_Pri),
1042SN/A      cause(_cause),
1052SN/A      downCounter(_downCounter)
1062SN/A{
1072SN/A    // catch stupid mistakes
1082SN/A    assert(downCounter > 0);
1092SN/A
110396SN/A    schedule(_when);
1112SN/A}
1122SN/A
1132SN/A
1142SN/A//
1152SN/A// handle termination event
1162SN/A//
1172SN/Avoid
1182SN/ACountedExitEvent::process()
1192SN/A{
1202SN/A    if (--downCounter == 0) {
1212667Sstever@eecs.umich.edu        exitSimLoop(cause, 0);
1222SN/A    }
1232SN/A}
1242SN/A
1252SN/A
1262SN/Aconst char *
1272SN/ACountedExitEvent::description()
1282SN/A{
1292SN/A    return "counted exit";
1302SN/A}
1312SN/A
1322SN/A#ifdef CHECK_SWAP_CYCLES
1332SN/Anew CheckSwapEvent(&mainEventQueue, CHECK_SWAP_CYCLES);
1342SN/A#endif
1352SN/A
1362SN/Avoid
1372SN/ACheckSwapEvent::process()
1382SN/A{
1392SN/A    /*  Check the amount of free swap space  */
1402SN/A    long swap;
1412SN/A
1422SN/A    /*  returns free swap in KBytes  */
14352SN/A    swap = procInfo("/proc/meminfo", "SwapFree:");
1442SN/A
1452SN/A    if (swap < 1000)
1462SN/A        ccprintf(cerr, "\a\a\aWarning! Swap space is low (%d)\n", swap);
1472SN/A
1482SN/A    if (swap < 100) {
1492SN/A        cerr << "\a\aAborting Simulation! Inadequate swap space!\n\n";
1502667Sstever@eecs.umich.edu        exitSimLoop("Lack of swap space");
1512SN/A    }
1522SN/A
1532SN/A    schedule(curTick + interval);
1542SN/A}
1552SN/A
1562SN/Aconst char *
1572SN/ACheckSwapEvent::description()
1582SN/A{
1592SN/A    return "check swap";
1602SN/A}
1612SN/A
1622SN/A//
1632SN/A// handle progress event: print message and reschedule
1642SN/A//
1652SN/Avoid
1662SN/AProgressEvent::process()
1672SN/A{
1682SN/A    DPRINTFN("ProgressEvent\n");
1692SN/A    // reschedule for next interval
1702SN/A    schedule(curTick + interval);
1712SN/A}
1722SN/A
1732SN/A
1742SN/Aconst char *
1752SN/AProgressEvent::description()
1762SN/A{
1772SN/A    return "progress message";
1782SN/A}
179