sim_events.cc revision 2665
12SN/A/* 21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert 292SN/A */ 302SN/A 312SN/A#include <string> 322SN/A 33601SN/A#include "base/callback.hh" 34601SN/A#include "base/hostinfo.hh" 35601SN/A#include "sim/eventq.hh" 3685SN/A#include "sim/param.hh" 3756SN/A#include "sim/sim_events.hh" 3856SN/A#include "sim/sim_exit.hh" 391127SN/A#include "sim/startup.hh" 40695SN/A#include "sim/stats.hh" 412SN/A 422SN/Ausing namespace std; 432SN/A 442SN/A// 452SN/A// handle termination event 462SN/A// 472SN/Avoid 482SN/ASimExitEvent::process() 492SN/A{ 502SN/A // This event does not autodelete because exitNow may be called, 512SN/A // and the function will never be allowed to finish. 522SN/A if (theQueue() == &mainEventQueue) { 532SN/A string _cause = cause; 542SN/A int _code = code; 552SN/A delete this; 562SN/A exitNow(_cause, _code); 572SN/A } else { 582SN/A new SimExitEvent(cause, code); 592SN/A delete this; 602SN/A } 612SN/A} 622SN/A 632SN/A 642SN/Aconst char * 652SN/ASimExitEvent::description() 662SN/A{ 672SN/A return "simulation termination"; 682SN/A} 692SN/A 702SN/A// 712SN/A// constructor: automatically schedules at specified time 722SN/A// 732SN/ACountedExitEvent::CountedExitEvent(EventQueue *q, const std::string &_cause, 742SN/A Tick _when, int &_downCounter) 75396SN/A : Event(q, Sim_Exit_Pri), 762SN/A cause(_cause), 772SN/A downCounter(_downCounter) 782SN/A{ 792SN/A // catch stupid mistakes 802SN/A assert(downCounter > 0); 812SN/A 82396SN/A schedule(_when); 832SN/A} 842SN/A 852SN/A 862SN/A// 872SN/A// handle termination event 882SN/A// 892SN/Avoid 902SN/ACountedExitEvent::process() 912SN/A{ 922SN/A if (--downCounter == 0) { 93392SN/A new SimExitEvent(cause, 0); 942SN/A } 952SN/A} 962SN/A 972SN/A 982SN/Aconst char * 992SN/ACountedExitEvent::description() 1002SN/A{ 1012SN/A return "counted exit"; 1022SN/A} 1032SN/A 1042SN/A#ifdef CHECK_SWAP_CYCLES 1052SN/Anew CheckSwapEvent(&mainEventQueue, CHECK_SWAP_CYCLES); 1062SN/A#endif 1072SN/A 1082SN/Avoid 1092SN/ACheckSwapEvent::process() 1102SN/A{ 1112SN/A /* Check the amount of free swap space */ 1122SN/A long swap; 1132SN/A 1142SN/A /* returns free swap in KBytes */ 11552SN/A swap = procInfo("/proc/meminfo", "SwapFree:"); 1162SN/A 1172SN/A if (swap < 1000) 1182SN/A ccprintf(cerr, "\a\a\aWarning! Swap space is low (%d)\n", swap); 1192SN/A 1202SN/A if (swap < 100) { 1212SN/A cerr << "\a\aAborting Simulation! Inadequate swap space!\n\n"; 1222SN/A new SimExitEvent("Lack of swap space"); 1232SN/A } 1242SN/A 1252SN/A schedule(curTick + interval); 1262SN/A} 1272SN/A 1282SN/Aconst char * 1292SN/ACheckSwapEvent::description() 1302SN/A{ 1312SN/A return "check swap"; 1322SN/A} 1332SN/A 1342SN/A// 1352SN/A// handle progress event: print message and reschedule 1362SN/A// 1372SN/Avoid 1382SN/AProgressEvent::process() 1392SN/A{ 1402SN/A DPRINTFN("ProgressEvent\n"); 1412SN/A // reschedule for next interval 1422SN/A schedule(curTick + interval); 1432SN/A} 1442SN/A 1452SN/A 1462SN/Aconst char * 1472SN/AProgressEvent::description() 1482SN/A{ 1492SN/A return "progress message"; 1502SN/A} 151