root.cc revision 8901
12SN/A/*
21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
38332Snate@binkert.org * Copyright (c) 2011 Advanced Micro Devices, Inc.
42SN/A * All rights reserved.
52SN/A *
62SN/A * Redistribution and use in source and binary forms, with or without
72SN/A * modification, are permitted provided that the following conditions are
82SN/A * met: redistributions of source code must retain the above copyright
92SN/A * notice, this list of conditions and the following disclaimer;
102SN/A * redistributions in binary form must reproduce the above copyright
112SN/A * notice, this list of conditions and the following disclaimer in the
122SN/A * documentation and/or other materials provided with the distribution;
132SN/A * neither the name of the copyright holders nor the names of its
142SN/A * contributors may be used to endorse or promote products derived from
152SN/A * this software without specific prior written permission.
162SN/A *
172SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
232SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
242SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
252SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
262SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282665Ssaidi@eecs.umich.edu *
292665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert
302665Ssaidi@eecs.umich.edu *          Steve Reinhardt
317861Sgblack@eecs.umich.edu *          Gabe Black
322SN/A */
332SN/A
34488SN/A#include "base/misc.hh"
358232Snate@binkert.org#include "debug/TimeSync.hh"
368801Sgblack@eecs.umich.edu#include "sim/full_system.hh"
377861Sgblack@eecs.umich.edu#include "sim/root.hh"
381609SN/A
397861Sgblack@eecs.umich.eduRoot *Root::_root = NULL;
407861Sgblack@eecs.umich.edu
417861Sgblack@eecs.umich.edu/*
427861Sgblack@eecs.umich.edu * This function is called periodically by an event in M5 and ensures that
437861Sgblack@eecs.umich.edu * at least as much real time has passed between invocations as simulated time.
447861Sgblack@eecs.umich.edu * If not, the function either sleeps, or if the difference is small enough
457861Sgblack@eecs.umich.edu * spin waits.
467861Sgblack@eecs.umich.edu */
477861Sgblack@eecs.umich.eduvoid
487861Sgblack@eecs.umich.eduRoot::timeSync()
492SN/A{
507861Sgblack@eecs.umich.edu    Time cur_time, diff, period = timeSyncPeriod();
517861Sgblack@eecs.umich.edu
527861Sgblack@eecs.umich.edu    do {
537861Sgblack@eecs.umich.edu        cur_time.setTimer();
547861Sgblack@eecs.umich.edu        diff = cur_time - lastTime;
557861Sgblack@eecs.umich.edu        Time remainder = period - diff;
567861Sgblack@eecs.umich.edu        if (diff < period && remainder > _spinThreshold) {
577861Sgblack@eecs.umich.edu            DPRINTF(TimeSync, "Sleeping to sync with real time.\n");
587861Sgblack@eecs.umich.edu            // Sleep until the end of the period, or until a signal.
597861Sgblack@eecs.umich.edu            sleep(remainder);
607861Sgblack@eecs.umich.edu            // Refresh the current time.
617861Sgblack@eecs.umich.edu            cur_time.setTimer();
627861Sgblack@eecs.umich.edu        }
637861Sgblack@eecs.umich.edu    } while (diff < period);
647861Sgblack@eecs.umich.edu    lastTime = cur_time;
657861Sgblack@eecs.umich.edu    schedule(&syncEvent, curTick() + _periodTick);
667861Sgblack@eecs.umich.edu}
677861Sgblack@eecs.umich.edu
687861Sgblack@eecs.umich.eduvoid
697861Sgblack@eecs.umich.eduRoot::timeSyncEnable(bool en)
707861Sgblack@eecs.umich.edu{
717861Sgblack@eecs.umich.edu    if (en == _enabled)
727861Sgblack@eecs.umich.edu        return;
737861Sgblack@eecs.umich.edu    _enabled = en;
747861Sgblack@eecs.umich.edu    if (_enabled) {
757861Sgblack@eecs.umich.edu        // Get event going.
767861Sgblack@eecs.umich.edu        Tick periods = ((curTick() + _periodTick - 1) / _periodTick);
777861Sgblack@eecs.umich.edu        Tick nextPeriod = periods * _periodTick;
787861Sgblack@eecs.umich.edu        schedule(&syncEvent, nextPeriod);
797861Sgblack@eecs.umich.edu    } else {
807861Sgblack@eecs.umich.edu        // Stop event.
817861Sgblack@eecs.umich.edu        deschedule(&syncEvent);
827861Sgblack@eecs.umich.edu    }
837861Sgblack@eecs.umich.edu}
847861Sgblack@eecs.umich.edu
857861Sgblack@eecs.umich.edu/// Configure the period for time sync events.
867861Sgblack@eecs.umich.eduvoid
877861Sgblack@eecs.umich.eduRoot::timeSyncPeriod(Time newPeriod)
887861Sgblack@eecs.umich.edu{
897861Sgblack@eecs.umich.edu    bool en = timeSyncEnabled();
907861Sgblack@eecs.umich.edu    _period = newPeriod;
917863Sgblack@eecs.umich.edu    _periodTick = _period.getTick();
927861Sgblack@eecs.umich.edu    timeSyncEnable(en);
937861Sgblack@eecs.umich.edu}
947861Sgblack@eecs.umich.edu
957861Sgblack@eecs.umich.edu/// Set the threshold for time remaining to spin wait.
967861Sgblack@eecs.umich.eduvoid
977861Sgblack@eecs.umich.eduRoot::timeSyncSpinThreshold(Time newThreshold)
987861Sgblack@eecs.umich.edu{
997861Sgblack@eecs.umich.edu    bool en = timeSyncEnabled();
1007861Sgblack@eecs.umich.edu    _spinThreshold = newThreshold;
1017861Sgblack@eecs.umich.edu    timeSyncEnable(en);
1027861Sgblack@eecs.umich.edu}
1037861Sgblack@eecs.umich.edu
1047861Sgblack@eecs.umich.eduRoot::Root(RootParams *p) : SimObject(p), _enabled(false),
1057861Sgblack@eecs.umich.edu    _periodTick(p->time_sync_period), syncEvent(this)
1067861Sgblack@eecs.umich.edu{
1077863Sgblack@eecs.umich.edu    _period.setTick(p->time_sync_period);
1087863Sgblack@eecs.umich.edu    _spinThreshold.setTick(p->time_sync_spin_threshold);
1097861Sgblack@eecs.umich.edu
1107861Sgblack@eecs.umich.edu    assert(_root == NULL);
1117861Sgblack@eecs.umich.edu    _root = this;
1127861Sgblack@eecs.umich.edu    lastTime.setTimer();
1137942SAli.Saidi@ARM.com}
1147942SAli.Saidi@ARM.com
1157942SAli.Saidi@ARM.comvoid
1167942SAli.Saidi@ARM.comRoot::initState()
1177942SAli.Saidi@ARM.com{
1187942SAli.Saidi@ARM.com    timeSyncEnable(params()->time_sync_enable);
1197942SAli.Saidi@ARM.com}
1207942SAli.Saidi@ARM.com
1217942SAli.Saidi@ARM.comvoid
1227942SAli.Saidi@ARM.comRoot::loadState(Checkpoint *cp)
1237942SAli.Saidi@ARM.com{
1247942SAli.Saidi@ARM.com    timeSyncEnable(params()->time_sync_enable);
1257861Sgblack@eecs.umich.edu}
1261104SN/A
1278801Sgblack@eecs.umich.edubool FullSystem;
1288901Sandreas.hansson@arm.comunsigned int FullSystemInt;
1298801Sgblack@eecs.umich.edu
1304762Snate@binkert.orgRoot *
1314762Snate@binkert.orgRootParams::create()
1321310SN/A{
1331388SN/A    static bool created = false;
1341388SN/A    if (created)
1351388SN/A        panic("only one root object allowed!");
1361388SN/A
1371388SN/A    created = true;
1381310SN/A
1398801Sgblack@eecs.umich.edu    FullSystem = full_system;
1408901Sandreas.hansson@arm.com    FullSystemInt = full_system ? 1 : 0;
1418801Sgblack@eecs.umich.edu
1424762Snate@binkert.org    return new Root(this);
1431310SN/A}
144