pseudo_inst.cc revision 9457
12SN/A/* 21762SN/A * Copyright (c) 2010-2011 ARM Limited 32SN/A * All rights reserved 42SN/A * 52SN/A * The license below extends only to copyright in the software and shall 62SN/A * not be construed as granting a license to any other intellectual 72SN/A * property including but not limited to intellectual property relating 82SN/A * to a hardware implementation of the functionality of the software 92SN/A * licensed hereunder. You may use the software subject to the license 102SN/A * terms below provided that you ensure that this notice is replicated 112SN/A * unmodified and in its entirety in all distributions of the software, 122SN/A * modified or unmodified, in source code or in binary form. 132SN/A * 142SN/A * Copyright (c) 2011 Advanced Micro Devices, Inc. 152SN/A * Copyright (c) 2003-2006 The Regents of The University of Michigan 162SN/A * All rights reserved. 172SN/A * 182SN/A * Redistribution and use in source and binary forms, with or without 192SN/A * modification, are permitted provided that the following conditions are 202SN/A * met: redistributions of source code must retain the above copyright 212SN/A * notice, this list of conditions and the following disclaimer; 222SN/A * redistributions in binary form must reproduce the above copyright 232SN/A * notice, this list of conditions and the following disclaimer in the 242SN/A * documentation and/or other materials provided with the distribution; 252SN/A * neither the name of the copyright holders nor the names of its 262SN/A * contributors may be used to endorse or promote products derived from 272665Ssaidi@eecs.umich.edu * this software without specific prior written permission. 282665Ssaidi@eecs.umich.edu * 292665Ssaidi@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 302SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 312SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 322SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 332SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 342SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 353918Ssaidi@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 362SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 372SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 382SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 394046Sbinkertn@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 404046Sbinkertn@umich.edu * 414046Sbinkertn@umich.edu * Authors: Nathan Binkert 424046Sbinkertn@umich.edu */ 4356SN/A 442SN/A#include <fcntl.h> 453064Sgblack@eecs.umich.edu#include <unistd.h> 462SN/A 472SN/A#include <cerrno> 482SN/A#include <fstream> 492SN/A#include <string> 504046Sbinkertn@umich.edu 512SN/A#include "arch/kernel_stats.hh" 522SN/A#include "arch/vtophys.hh" 532107SN/A#include "base/debug.hh" 542SN/A#include "base/output.hh" 554046Sbinkertn@umich.edu#include "config/the_isa.hh" 564046Sbinkertn@umich.edu#include "cpu/base.hh" 572SN/A#include "cpu/quiesce_event.hh" 582SN/A#include "cpu/thread_context.hh" 593064Sgblack@eecs.umich.edu#include "debug/Loader.hh" 602SN/A#include "debug/Quiesce.hh" 612SN/A#include "debug/WorkItems.hh" 622107SN/A#include "params/BaseCPU.hh" 632SN/A#include "sim/full_system.hh" 642SN/A#include "sim/pseudo_inst.hh" 652SN/A#include "sim/serialize.hh" 662SN/A#include "sim/sim_events.hh" 672SN/A#include "sim/sim_exit.hh" 682SN/A#include "sim/stat_control.hh" 692SN/A#include "sim/stats.hh" 702SN/A#include "sim/system.hh" 712SN/A#include "sim/vptr.hh" 722SN/A 732SN/Ausing namespace std; 742SN/A 752SN/Ausing namespace Stats; 762SN/Ausing namespace TheISA; 772SN/A 782SN/Anamespace PseudoInst { 792SN/A 802SN/Astatic inline void 812SN/ApanicFsOnlyPseudoInst(const char *name) 822SN/A{ 832SN/A panic("Pseudo inst \"%s\" is only available in Full System mode."); 842SN/A} 852SN/A 862SN/Avoid 872SN/Aarm(ThreadContext *tc) 882SN/A{ 892SN/A if (!FullSystem) 902SN/A panicFsOnlyPseudoInst("arm"); 912SN/A 922SN/A if (tc->getKernelStats()) 932SN/A tc->getKernelStats()->arm(); 942SN/A} 952SN/A 962SN/Avoid 972SN/Aquiesce(ThreadContext *tc) 982SN/A{ 992SN/A if (!FullSystem) 1004046Sbinkertn@umich.edu panicFsOnlyPseudoInst("quiesce"); 1012107SN/A 1023064Sgblack@eecs.umich.edu if (!tc->getCpuPtr()->params()->do_quiesce) 1034046Sbinkertn@umich.edu return; 1043064Sgblack@eecs.umich.edu 1053064Sgblack@eecs.umich.edu DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name()); 1062SN/A 1072SN/A tc->suspend(); 1082SN/A if (tc->getKernelStats()) 1092SN/A tc->getKernelStats()->quiesce(); 1102SN/A} 1112SN/A 1122SN/Avoid 1132SN/AquiesceSkip(ThreadContext *tc) 1142SN/A{ 1154046Sbinkertn@umich.edu if (!FullSystem) 1162SN/A panicFsOnlyPseudoInst("quiesceSkip"); 1172SN/A 1182SN/A BaseCPU *cpu = tc->getCpuPtr(); 1192SN/A 1202SN/A if (!cpu->params()->do_quiesce) 1212SN/A return; 1222SN/A 1232SN/A EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 1242SN/A 1252SN/A Tick resume = curTick() + 1; 1262SN/A 1272SN/A cpu->reschedule(quiesceEvent, resume, true); 1282SN/A 1292SN/A DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n", 1302SN/A cpu->name(), resume); 1312SN/A 1322SN/A tc->suspend(); 1332SN/A if (tc->getKernelStats()) 1342SN/A tc->getKernelStats()->quiesce(); 1352SN/A} 1362SN/A 1372SN/Avoid 1382SN/AquiesceNs(ThreadContext *tc, uint64_t ns) 1394046Sbinkertn@umich.edu{ 1402SN/A if (!FullSystem) 1412SN/A panicFsOnlyPseudoInst("quiesceNs"); 1422SN/A 1432SN/A BaseCPU *cpu = tc->getCpuPtr(); 1442SN/A 1452SN/A if (!cpu->params()->do_quiesce || ns == 0) 1462SN/A return; 1472SN/A 1482SN/A EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 1493918Ssaidi@eecs.umich.edu 1502SN/A Tick resume = curTick() + SimClock::Int::ns * ns; 1512SN/A 1522SN/A cpu->reschedule(quiesceEvent, resume, true); 1534054Sbinkertn@umich.edu 1544054Sbinkertn@umich.edu DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n", 1553064Sgblack@eecs.umich.edu cpu->name(), ns, resume); 1562SN/A 1574054Sbinkertn@umich.edu tc->suspend(); 1584054Sbinkertn@umich.edu if (tc->getKernelStats()) 1592SN/A tc->getKernelStats()->quiesce(); 1604074Sbinkertn@umich.edu} 1614074Sbinkertn@umich.edu 1624074Sbinkertn@umich.eduvoid 1634054Sbinkertn@umich.eduquiesceCycles(ThreadContext *tc, uint64_t cycles) 1644054Sbinkertn@umich.edu{ 1654054Sbinkertn@umich.edu if (!FullSystem) 1664054Sbinkertn@umich.edu panicFsOnlyPseudoInst("quiesceCycles"); 1672SN/A 1682SN/A BaseCPU *cpu = tc->getCpuPtr(); 1694054Sbinkertn@umich.edu 1702SN/A if (!cpu->params()->do_quiesce || cycles == 0) 1712SN/A return; 172 173 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 174 175 Tick resume = cpu->clockEdge(Cycles(cycles)); 176 177 cpu->reschedule(quiesceEvent, resume, true); 178 179 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n", 180 cpu->name(), cycles, resume); 181 182 tc->suspend(); 183 if (tc->getKernelStats()) 184 tc->getKernelStats()->quiesce(); 185} 186 187uint64_t 188quiesceTime(ThreadContext *tc) 189{ 190 if (!FullSystem) { 191 panicFsOnlyPseudoInst("quiesceTime"); 192 return 0; 193 } 194 195 return (tc->readLastActivate() - tc->readLastSuspend()) / 196 SimClock::Int::ns; 197} 198 199uint64_t 200rpns(ThreadContext *tc) 201{ 202 return curTick() / SimClock::Int::ns; 203} 204 205void 206wakeCPU(ThreadContext *tc, uint64_t cpuid) 207{ 208 System *sys = tc->getSystemPtr(); 209 ThreadContext *other_tc = sys->threadContexts[cpuid]; 210 if (other_tc->status() == ThreadContext::Suspended) 211 other_tc->activate(); 212} 213 214void 215m5exit(ThreadContext *tc, Tick delay) 216{ 217 Tick when = curTick() + delay * SimClock::Int::ns; 218 exitSimLoop("m5_exit instruction encountered", 0, when); 219} 220 221void 222m5fail(ThreadContext *tc, Tick delay, uint64_t code) 223{ 224 Tick when = curTick() + delay * SimClock::Int::ns; 225 exitSimLoop("m5_fail instruction encountered", code, when); 226} 227 228void 229loadsymbol(ThreadContext *tc) 230{ 231 if (!FullSystem) 232 panicFsOnlyPseudoInst("loadsymbol"); 233 234 const string &filename = tc->getCpuPtr()->system->params()->symbolfile; 235 if (filename.empty()) { 236 return; 237 } 238 239 std::string buffer; 240 ifstream file(filename.c_str()); 241 242 if (!file) 243 fatal("file error: Can't open symbol table file %s\n", filename); 244 245 while (!file.eof()) { 246 getline(file, buffer); 247 248 if (buffer.empty()) 249 continue; 250 251 string::size_type idx = buffer.find(' '); 252 if (idx == string::npos) 253 continue; 254 255 string address = "0x" + buffer.substr(0, idx); 256 eat_white(address); 257 if (address.empty()) 258 continue; 259 260 // Skip over letter and space 261 string symbol = buffer.substr(idx + 3); 262 eat_white(symbol); 263 if (symbol.empty()) 264 continue; 265 266 Addr addr; 267 if (!to_number(address, addr)) 268 continue; 269 270 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol)) 271 continue; 272 273 274 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 275 } 276 file.close(); 277} 278 279void 280addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) 281{ 282 if (!FullSystem) 283 panicFsOnlyPseudoInst("addSymbol"); 284 285 char symb[100]; 286 CopyStringOut(tc, symb, symbolAddr, 100); 287 std::string symbol(symb); 288 289 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 290 291 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 292 debugSymbolTable->insert(addr,symbol); 293} 294 295uint64_t 296initParam(ThreadContext *tc) 297{ 298 if (!FullSystem) { 299 panicFsOnlyPseudoInst("initParam"); 300 return 0; 301 } 302 303 return tc->getCpuPtr()->system->init_param; 304} 305 306 307void 308resetstats(ThreadContext *tc, Tick delay, Tick period) 309{ 310 if (!tc->getCpuPtr()->params()->do_statistics_insts) 311 return; 312 313 314 Tick when = curTick() + delay * SimClock::Int::ns; 315 Tick repeat = period * SimClock::Int::ns; 316 317 Stats::schedStatEvent(false, true, when, repeat); 318} 319 320void 321dumpstats(ThreadContext *tc, Tick delay, Tick period) 322{ 323 if (!tc->getCpuPtr()->params()->do_statistics_insts) 324 return; 325 326 327 Tick when = curTick() + delay * SimClock::Int::ns; 328 Tick repeat = period * SimClock::Int::ns; 329 330 Stats::schedStatEvent(true, false, when, repeat); 331} 332 333void 334dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 335{ 336 if (!tc->getCpuPtr()->params()->do_statistics_insts) 337 return; 338 339 340 Tick when = curTick() + delay * SimClock::Int::ns; 341 Tick repeat = period * SimClock::Int::ns; 342 343 Stats::schedStatEvent(true, true, when, repeat); 344} 345 346void 347m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 348{ 349 if (!tc->getCpuPtr()->params()->do_checkpoint_insts) 350 return; 351 352 Tick when = curTick() + delay * SimClock::Int::ns; 353 Tick repeat = period * SimClock::Int::ns; 354 355 exitSimLoop("checkpoint", 0, when, repeat); 356} 357 358uint64_t 359readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 360{ 361 if (!FullSystem) { 362 panicFsOnlyPseudoInst("readfile"); 363 return 0; 364 } 365 366 const string &file = tc->getSystemPtr()->params()->readfile; 367 if (file.empty()) { 368 return ULL(0); 369 } 370 371 uint64_t result = 0; 372 373 int fd = ::open(file.c_str(), O_RDONLY, 0); 374 if (fd < 0) 375 panic("could not open file %s\n", file); 376 377 if (::lseek(fd, offset, SEEK_SET) < 0) 378 panic("could not seek: %s", strerror(errno)); 379 380 char *buf = new char[len]; 381 char *p = buf; 382 while (len > 0) { 383 int bytes = ::read(fd, p, len); 384 if (bytes <= 0) 385 break; 386 387 p += bytes; 388 result += bytes; 389 len -= bytes; 390 } 391 392 close(fd); 393 CopyIn(tc, vaddr, buf, result); 394 delete [] buf; 395 return result; 396} 397 398uint64_t 399writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, 400 Addr filename_addr) 401{ 402 ostream *os; 403 404 // copy out target filename 405 char fn[100]; 406 std::string filename; 407 CopyStringOut(tc, fn, filename_addr, 100); 408 filename = std::string(fn); 409 410 if (offset == 0) { 411 // create a new file (truncate) 412 os = simout.create(filename, true); 413 } else { 414 // do not truncate file if offset is non-zero 415 // (ios::in flag is required as well to keep the existing data 416 // intact, otherwise existing data will be zeroed out.) 417 os = simout.openFile(simout.directory() + filename, 418 ios::in | ios::out | ios::binary); 419 } 420 if (!os) 421 panic("could not open file %s\n", filename); 422 423 // seek to offset 424 os->seekp(offset); 425 426 // copy out data and write to file 427 char *buf = new char[len]; 428 CopyOut(tc, buf, vaddr, len); 429 os->write(buf, len); 430 if (os->fail() || os->bad()) 431 panic("Error while doing writefile!\n"); 432 433 simout.close(os); 434 435 delete [] buf; 436 437 return len; 438} 439 440void 441debugbreak(ThreadContext *tc) 442{ 443 Debug::breakpoint(); 444} 445 446void 447switchcpu(ThreadContext *tc) 448{ 449 exitSimLoop("switchcpu"); 450} 451 452// 453// This function is executed when annotated work items begin. Depending on 454// what the user specified at the command line, the simulation may exit and/or 455// take a checkpoint when a certain work item begins. 456// 457void 458workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) 459{ 460 tc->getCpuPtr()->workItemBegin(); 461 System *sys = tc->getSystemPtr(); 462 const System::Params *params = sys->params(); 463 sys->workItemBegin(threadid, workid); 464 465 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid, 466 threadid); 467 468 // 469 // If specified, determine if this is the specific work item the user 470 // identified 471 // 472 if (params->work_item_id == -1 || params->work_item_id == workid) { 473 474 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin(); 475 int cpuId = tc->getCpuPtr()->cpuId(); 476 477 if (params->work_cpus_ckpt_count != 0 && 478 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 479 // 480 // If active cpus equals checkpoint count, create checkpoint 481 // 482 exitSimLoop("checkpoint"); 483 } 484 485 if (systemWorkBeginCount == params->work_begin_ckpt_count) { 486 // 487 // Note: the string specified as the cause of the exit event must 488 // exactly equal "checkpoint" inorder to create a checkpoint 489 // 490 exitSimLoop("checkpoint"); 491 } 492 493 if (systemWorkBeginCount == params->work_begin_exit_count) { 494 // 495 // If a certain number of work items started, exit simulation 496 // 497 exitSimLoop("work started count reach"); 498 } 499 500 if (cpuId == params->work_begin_cpu_id_exit) { 501 // 502 // If work started on the cpu id specified, exit simulation 503 // 504 exitSimLoop("work started on specific cpu"); 505 } 506 } 507} 508 509// 510// This function is executed when annotated work items end. Depending on 511// what the user specified at the command line, the simulation may exit and/or 512// take a checkpoint when a certain work item ends. 513// 514void 515workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) 516{ 517 tc->getCpuPtr()->workItemEnd(); 518 System *sys = tc->getSystemPtr(); 519 const System::Params *params = sys->params(); 520 sys->workItemEnd(threadid, workid); 521 522 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid); 523 524 // 525 // If specified, determine if this is the specific work item the user 526 // identified 527 // 528 if (params->work_item_id == -1 || params->work_item_id == workid) { 529 530 uint64_t systemWorkEndCount = sys->incWorkItemsEnd(); 531 int cpuId = tc->getCpuPtr()->cpuId(); 532 533 if (params->work_cpus_ckpt_count != 0 && 534 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 535 // 536 // If active cpus equals checkpoint count, create checkpoint 537 // 538 exitSimLoop("checkpoint"); 539 } 540 541 if (params->work_end_ckpt_count != 0 && 542 systemWorkEndCount == params->work_end_ckpt_count) { 543 // 544 // If total work items completed equals checkpoint count, create 545 // checkpoint 546 // 547 exitSimLoop("checkpoint"); 548 } 549 550 if (params->work_end_exit_count != 0 && 551 systemWorkEndCount == params->work_end_exit_count) { 552 // 553 // If total work items completed equals exit count, exit simulation 554 // 555 exitSimLoop("work items exit count reached"); 556 } 557 } 558} 559 560} // namespace PseudoInst 561