pseudo_inst.cc revision 8798:adaa92be9037
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2011 Advanced Micro Devices, Inc. 15 * Copyright (c) 2003-2006 The Regents of The University of Michigan 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Nathan Binkert 42 */ 43 44#include <fcntl.h> 45#include <unistd.h> 46 47#include <cerrno> 48#include <fstream> 49#include <string> 50 51#include "arch/kernel_stats.hh" 52#include "arch/vtophys.hh" 53#include "base/debug.hh" 54#include "config/the_isa.hh" 55#include "cpu/base.hh" 56#include "cpu/quiesce_event.hh" 57#include "cpu/thread_context.hh" 58#include "debug/Loader.hh" 59#include "debug/Quiesce.hh" 60#include "debug/WorkItems.hh" 61#include "params/BaseCPU.hh" 62#include "sim/full_system.hh" 63#include "sim/pseudo_inst.hh" 64#include "sim/serialize.hh" 65#include "sim/sim_events.hh" 66#include "sim/sim_exit.hh" 67#include "sim/stat_control.hh" 68#include "sim/stats.hh" 69#include "sim/system.hh" 70#include "sim/vptr.hh" 71 72using namespace std; 73 74using namespace Stats; 75using namespace TheISA; 76 77namespace PseudoInst { 78 79static inline void 80panicFsOnlyPseudoInst(const char *name) 81{ 82 panic("Pseudo inst \"%s\" is only available in Full System mode."); 83} 84 85void 86arm(ThreadContext *tc) 87{ 88 if (FullSystem) { 89 if (tc->getKernelStats()) 90 tc->getKernelStats()->arm(); 91 } else { 92 panicFsOnlyPseudoInst("arm"); 93 } 94} 95 96void 97quiesce(ThreadContext *tc) 98{ 99 if (FullSystem) { 100 if (!tc->getCpuPtr()->params()->do_quiesce) 101 return; 102 103 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name()); 104 105 tc->suspend(); 106 if (tc->getKernelStats()) 107 tc->getKernelStats()->quiesce(); 108 } else { 109 panicFsOnlyPseudoInst("quiesce"); 110 } 111} 112 113void 114quiesceSkip(ThreadContext *tc) 115{ 116 if (FullSystem) { 117 BaseCPU *cpu = tc->getCpuPtr(); 118 119 if (!cpu->params()->do_quiesce) 120 return; 121 122 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 123 124 Tick resume = curTick() + 1; 125 126 cpu->reschedule(quiesceEvent, resume, true); 127 128 DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n", 129 cpu->name(), resume); 130 131 tc->suspend(); 132 if (tc->getKernelStats()) 133 tc->getKernelStats()->quiesce(); 134 } else { 135 panicFsOnlyPseudoInst("quiesceSkip"); 136 } 137} 138 139void 140quiesceNs(ThreadContext *tc, uint64_t ns) 141{ 142 if (FullSystem) { 143 BaseCPU *cpu = tc->getCpuPtr(); 144 145 if (!cpu->params()->do_quiesce || ns == 0) 146 return; 147 148 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 149 150 Tick resume = curTick() + SimClock::Int::ns * ns; 151 152 cpu->reschedule(quiesceEvent, resume, true); 153 154 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n", 155 cpu->name(), ns, resume); 156 157 tc->suspend(); 158 if (tc->getKernelStats()) 159 tc->getKernelStats()->quiesce(); 160 } else { 161 panicFsOnlyPseudoInst("quiesceNs"); 162 } 163} 164 165void 166quiesceCycles(ThreadContext *tc, uint64_t cycles) 167{ 168 if (FullSystem) { 169 BaseCPU *cpu = tc->getCpuPtr(); 170 171 if (!cpu->params()->do_quiesce || cycles == 0) 172 return; 173 174 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); 175 176 Tick resume = curTick() + cpu->ticks(cycles); 177 178 cpu->reschedule(quiesceEvent, resume, true); 179 180 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n", 181 cpu->name(), cycles, resume); 182 183 tc->suspend(); 184 if (tc->getKernelStats()) 185 tc->getKernelStats()->quiesce(); 186 } else { 187 panicFsOnlyPseudoInst("quiesceCycles"); 188 } 189} 190 191uint64_t 192quiesceTime(ThreadContext *tc) 193{ 194 if (FullSystem) { 195 return (tc->readLastActivate() - tc->readLastSuspend()) / 196 SimClock::Int::ns; 197 } else { 198 panicFsOnlyPseudoInst("quiesceTime"); 199 return 0; 200 } 201} 202 203uint64_t 204rpns(ThreadContext *tc) 205{ 206 return curTick() / SimClock::Int::ns; 207} 208 209void 210wakeCPU(ThreadContext *tc, uint64_t cpuid) 211{ 212 System *sys = tc->getSystemPtr(); 213 ThreadContext *other_tc = sys->threadContexts[cpuid]; 214 if (other_tc->status() == ThreadContext::Suspended) 215 other_tc->activate(); 216} 217 218void 219m5exit(ThreadContext *tc, Tick delay) 220{ 221 Tick when = curTick() + delay * SimClock::Int::ns; 222 exitSimLoop("m5_exit instruction encountered", 0, when); 223} 224 225void 226loadsymbol(ThreadContext *tc) 227{ 228 if (FullSystem) { 229 const string &filename = tc->getCpuPtr()->system->params()->symbolfile; 230 if (filename.empty()) { 231 return; 232 } 233 234 std::string buffer; 235 ifstream file(filename.c_str()); 236 237 if (!file) 238 fatal("file error: Can't open symbol table file %s\n", filename); 239 240 while (!file.eof()) { 241 getline(file, buffer); 242 243 if (buffer.empty()) 244 continue; 245 246 string::size_type idx = buffer.find(' '); 247 if (idx == string::npos) 248 continue; 249 250 string address = "0x" + buffer.substr(0, idx); 251 eat_white(address); 252 if (address.empty()) 253 continue; 254 255 // Skip over letter and space 256 string symbol = buffer.substr(idx + 3); 257 eat_white(symbol); 258 if (symbol.empty()) 259 continue; 260 261 Addr addr; 262 if (!to_number(address, addr)) 263 continue; 264 265 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol)) 266 continue; 267 268 269 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 270 } 271 file.close(); 272 } else { 273 panicFsOnlyPseudoInst("loadsymbol"); 274 } 275} 276 277void 278addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) 279{ 280 if (FullSystem) { 281 char symb[100]; 282 CopyStringOut(tc, symb, symbolAddr, 100); 283 std::string symbol(symb); 284 285 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 286 287 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 288 debugSymbolTable->insert(addr,symbol); 289 } else { 290 panicFsOnlyPseudoInst("addSymbol"); 291 } 292} 293 294uint64_t 295initParam(ThreadContext *tc) 296{ 297 if (FullSystem) { 298 return tc->getCpuPtr()->system->init_param; 299 } else { 300 panicFsOnlyPseudoInst("initParam"); 301 return 0; 302 } 303} 304 305 306void 307resetstats(ThreadContext *tc, Tick delay, Tick period) 308{ 309 if (!tc->getCpuPtr()->params()->do_statistics_insts) 310 return; 311 312 313 Tick when = curTick() + delay * SimClock::Int::ns; 314 Tick repeat = period * SimClock::Int::ns; 315 316 Stats::schedStatEvent(false, true, when, repeat); 317} 318 319void 320dumpstats(ThreadContext *tc, Tick delay, Tick period) 321{ 322 if (!tc->getCpuPtr()->params()->do_statistics_insts) 323 return; 324 325 326 Tick when = curTick() + delay * SimClock::Int::ns; 327 Tick repeat = period * SimClock::Int::ns; 328 329 Stats::schedStatEvent(true, false, when, repeat); 330} 331 332void 333dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 334{ 335 if (!tc->getCpuPtr()->params()->do_statistics_insts) 336 return; 337 338 339 Tick when = curTick() + delay * SimClock::Int::ns; 340 Tick repeat = period * SimClock::Int::ns; 341 342 Stats::schedStatEvent(true, true, when, repeat); 343} 344 345void 346m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 347{ 348 if (!tc->getCpuPtr()->params()->do_checkpoint_insts) 349 return; 350 351 Tick when = curTick() + delay * SimClock::Int::ns; 352 Tick repeat = period * SimClock::Int::ns; 353 354 exitSimLoop("checkpoint", 0, when, repeat); 355} 356 357uint64_t 358readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 359{ 360 if (FullSystem) { 361 const string &file = tc->getSystemPtr()->params()->readfile; 362 if (file.empty()) { 363 return ULL(0); 364 } 365 366 uint64_t result = 0; 367 368 int fd = ::open(file.c_str(), O_RDONLY, 0); 369 if (fd < 0) 370 panic("could not open file %s\n", file); 371 372 if (::lseek(fd, offset, SEEK_SET) < 0) 373 panic("could not seek: %s", strerror(errno)); 374 375 char *buf = new char[len]; 376 char *p = buf; 377 while (len > 0) { 378 int bytes = ::read(fd, p, len); 379 if (bytes <= 0) 380 break; 381 382 p += bytes; 383 result += bytes; 384 len -= bytes; 385 } 386 387 close(fd); 388 CopyIn(tc, vaddr, buf, result); 389 delete [] buf; 390 return result; 391 } else { 392 panicFsOnlyPseudoInst("readfile"); 393 return 0; 394 } 395} 396 397void 398debugbreak(ThreadContext *tc) 399{ 400 Debug::breakpoint(); 401} 402 403void 404switchcpu(ThreadContext *tc) 405{ 406 exitSimLoop("switchcpu"); 407} 408 409// 410// This function is executed when annotated work items begin. Depending on 411// what the user specified at the command line, the simulation may exit and/or 412// take a checkpoint when a certain work item begins. 413// 414void 415workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) 416{ 417 tc->getCpuPtr()->workItemBegin(); 418 System *sys = tc->getSystemPtr(); 419 const System::Params *params = sys->params(); 420 sys->workItemBegin(threadid, workid); 421 422 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid, 423 threadid); 424 425 // 426 // If specified, determine if this is the specific work item the user 427 // identified 428 // 429 if (params->work_item_id == -1 || params->work_item_id == workid) { 430 431 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin(); 432 int cpuId = tc->getCpuPtr()->cpuId(); 433 434 if (params->work_cpus_ckpt_count != 0 && 435 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 436 // 437 // If active cpus equals checkpoint count, create checkpoint 438 // 439 exitSimLoop("checkpoint"); 440 } 441 442 if (systemWorkBeginCount == params->work_begin_ckpt_count) { 443 // 444 // Note: the string specified as the cause of the exit event must 445 // exactly equal "checkpoint" inorder to create a checkpoint 446 // 447 exitSimLoop("checkpoint"); 448 } 449 450 if (systemWorkBeginCount == params->work_begin_exit_count) { 451 // 452 // If a certain number of work items started, exit simulation 453 // 454 exitSimLoop("work started count reach"); 455 } 456 457 if (cpuId == params->work_begin_cpu_id_exit) { 458 // 459 // If work started on the cpu id specified, exit simulation 460 // 461 exitSimLoop("work started on specific cpu"); 462 } 463 } 464} 465 466// 467// This function is executed when annotated work items end. Depending on 468// what the user specified at the command line, the simulation may exit and/or 469// take a checkpoint when a certain work item ends. 470// 471void 472workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) 473{ 474 tc->getCpuPtr()->workItemEnd(); 475 System *sys = tc->getSystemPtr(); 476 const System::Params *params = sys->params(); 477 sys->workItemEnd(threadid, workid); 478 479 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid); 480 481 // 482 // If specified, determine if this is the specific work item the user 483 // identified 484 // 485 if (params->work_item_id == -1 || params->work_item_id == workid) { 486 487 uint64_t systemWorkEndCount = sys->incWorkItemsEnd(); 488 int cpuId = tc->getCpuPtr()->cpuId(); 489 490 if (params->work_cpus_ckpt_count != 0 && 491 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 492 // 493 // If active cpus equals checkpoint count, create checkpoint 494 // 495 exitSimLoop("checkpoint"); 496 } 497 498 if (params->work_end_ckpt_count != 0 && 499 systemWorkEndCount == params->work_end_ckpt_count) { 500 // 501 // If total work items completed equals checkpoint count, create 502 // checkpoint 503 // 504 exitSimLoop("checkpoint"); 505 } 506 507 if (params->work_end_exit_count != 0 && 508 systemWorkEndCount == params->work_end_exit_count) { 509 // 510 // If total work items completed equals exit count, exit simulation 511 // 512 exitSimLoop("work items exit count reached"); 513 } 514 } 515} 516 517} // namespace PseudoInst 518