pseudo_inst.cc revision 11627
1/* 2 * Copyright (c) 2010-2012, 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2011 Advanced Micro Devices, Inc. 15 * Copyright (c) 2003-2006 The Regents of The University of Michigan 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Nathan Binkert 42 */ 43 44#include <fcntl.h> 45#include <unistd.h> 46 47#include <cerrno> 48#include <fstream> 49#include <string> 50#include <vector> 51 52#include "arch/kernel_stats.hh" 53#include "arch/utility.hh" 54#include "arch/vtophys.hh" 55#include "arch/pseudo_inst.hh" 56#include "base/debug.hh" 57#include "base/output.hh" 58#include "config/the_isa.hh" 59#include "cpu/base.hh" 60#include "cpu/quiesce_event.hh" 61#include "cpu/thread_context.hh" 62#include "debug/Loader.hh" 63#include "debug/PseudoInst.hh" 64#include "debug/Quiesce.hh" 65#include "debug/WorkItems.hh" 66#include "dev/net/dist_iface.hh" 67#include "params/BaseCPU.hh" 68#include "sim/full_system.hh" 69#include "sim/initparam_keys.hh" 70#include "sim/process.hh" 71#include "sim/pseudo_inst.hh" 72#include "sim/serialize.hh" 73#include "sim/sim_events.hh" 74#include "sim/sim_exit.hh" 75#include "sim/stat_control.hh" 76#include "sim/stats.hh" 77#include "sim/system.hh" 78#include "sim/vptr.hh" 79 80using namespace std; 81 82using namespace Stats; 83using namespace TheISA; 84 85namespace PseudoInst { 86 87static inline void 88panicFsOnlyPseudoInst(const char *name) 89{ 90 panic("Pseudo inst \"%s\" is only available in Full System mode."); 91} 92 93uint64_t 94pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc) 95{ 96 uint64_t args[4]; 97 98 DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i, %i)\n", func, subfunc); 99 100 // We need to do this in a slightly convoluted way since 101 // getArgument() might have side-effects on arg_num. We could have 102 // used the Argument class, but due to the possible side effects 103 // from getArgument, it'd most likely break. 104 int arg_num(0); 105 for (int i = 0; i < sizeof(args) / sizeof(*args); ++i) { 106 args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false); 107 ++arg_num; 108 } 109 110 switch (func) { 111 case 0x00: // arm_func 112 arm(tc); 113 break; 114 115 case 0x01: // quiesce_func 116 quiesce(tc); 117 break; 118 119 case 0x02: // quiescens_func 120 quiesceSkip(tc); 121 break; 122 123 case 0x03: // quiescecycle_func 124 quiesceNs(tc, args[0]); 125 break; 126 127 case 0x04: // quiescetime_func 128 return quiesceTime(tc); 129 130 case 0x07: // rpns_func 131 return rpns(tc); 132 133 case 0x09: // wakecpu_func 134 wakeCPU(tc, args[0]); 135 break; 136 137 case 0x21: // exit_func 138 m5exit(tc, args[0]); 139 break; 140 141 case 0x22: 142 m5fail(tc, args[0], args[1]); 143 break; 144 145 case 0x30: // initparam_func 146 return initParam(tc, args[0], args[1]); 147 148 case 0x31: // loadsymbol_func 149 loadsymbol(tc); 150 break; 151 152 case 0x40: // resetstats_func 153 resetstats(tc, args[0], args[1]); 154 break; 155 156 case 0x41: // dumpstats_func 157 dumpstats(tc, args[0], args[1]); 158 break; 159 160 case 0x42: // dumprststats_func 161 dumpresetstats(tc, args[0], args[1]); 162 break; 163 164 case 0x43: // ckpt_func 165 m5checkpoint(tc, args[0], args[1]); 166 break; 167 168 case 0x4f: // writefile_func 169 return writefile(tc, args[0], args[1], args[2], args[3]); 170 171 case 0x50: // readfile_func 172 return readfile(tc, args[0], args[1], args[2]); 173 174 case 0x51: // debugbreak_func 175 debugbreak(tc); 176 break; 177 178 case 0x52: // switchcpu_func 179 switchcpu(tc); 180 break; 181 182 case 0x53: // addsymbol_func 183 addsymbol(tc, args[0], args[1]); 184 break; 185 186 case 0x54: // panic_func 187 panic("M5 panic instruction called at %s\n", tc->pcState()); 188 189 case 0x5a: // work_begin_func 190 workbegin(tc, args[0], args[1]); 191 break; 192 193 case 0x5b: // work_end_func 194 workend(tc, args[0], args[1]); 195 break; 196 197 case 0x55: // annotate_func 198 case 0x56: // reserved2_func 199 case 0x57: // reserved3_func 200 case 0x58: // reserved4_func 201 case 0x59: // reserved5_func 202 warn("Unimplemented m5 op (0x%x)\n", func); 203 break; 204 205 /* SE mode functions */ 206 case 0x60: // syscall_func 207 m5Syscall(tc); 208 break; 209 210 case 0x61: // pagefault_func 211 m5PageFault(tc); 212 break; 213 214 default: 215 warn("Unhandled m5 op: 0x%x\n", func); 216 break; 217 } 218 219 return 0; 220} 221 222void 223arm(ThreadContext *tc) 224{ 225 DPRINTF(PseudoInst, "PseudoInst::arm()\n"); 226 if (!FullSystem) 227 panicFsOnlyPseudoInst("arm"); 228 229 if (tc->getKernelStats()) 230 tc->getKernelStats()->arm(); 231} 232 233void 234quiesce(ThreadContext *tc) 235{ 236 DPRINTF(PseudoInst, "PseudoInst::quiesce()\n"); 237 tc->quiesce(); 238} 239 240void 241quiesceSkip(ThreadContext *tc) 242{ 243 DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n"); 244 tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1); 245} 246 247void 248quiesceNs(ThreadContext *tc, uint64_t ns) 249{ 250 DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns); 251 tc->quiesceTick(curTick() + SimClock::Int::ns * ns); 252} 253 254void 255quiesceCycles(ThreadContext *tc, uint64_t cycles) 256{ 257 DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles); 258 tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles))); 259} 260 261uint64_t 262quiesceTime(ThreadContext *tc) 263{ 264 DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n"); 265 266 return (tc->readLastActivate() - tc->readLastSuspend()) / 267 SimClock::Int::ns; 268} 269 270uint64_t 271rpns(ThreadContext *tc) 272{ 273 DPRINTF(PseudoInst, "PseudoInst::rpns()\n"); 274 return curTick() / SimClock::Int::ns; 275} 276 277void 278wakeCPU(ThreadContext *tc, uint64_t cpuid) 279{ 280 DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid); 281 System *sys = tc->getSystemPtr(); 282 ThreadContext *other_tc = sys->threadContexts[cpuid]; 283 if (other_tc->status() == ThreadContext::Suspended) 284 other_tc->activate(); 285} 286 287void 288m5exit(ThreadContext *tc, Tick delay) 289{ 290 DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay); 291 if (DistIface::readyToExit(delay)) { 292 Tick when = curTick() + delay * SimClock::Int::ns; 293 exitSimLoop("m5_exit instruction encountered", 0, when, 0, true); 294 } 295} 296 297void 298m5fail(ThreadContext *tc, Tick delay, uint64_t code) 299{ 300 DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code); 301 Tick when = curTick() + delay * SimClock::Int::ns; 302 exitSimLoop("m5_fail instruction encountered", code, when, 0, true); 303} 304 305void 306loadsymbol(ThreadContext *tc) 307{ 308 DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n"); 309 if (!FullSystem) 310 panicFsOnlyPseudoInst("loadsymbol"); 311 312 const string &filename = tc->getCpuPtr()->system->params()->symbolfile; 313 if (filename.empty()) { 314 return; 315 } 316 317 std::string buffer; 318 ifstream file(filename.c_str()); 319 320 if (!file) 321 fatal("file error: Can't open symbol table file %s\n", filename); 322 323 while (!file.eof()) { 324 getline(file, buffer); 325 326 if (buffer.empty()) 327 continue; 328 329 string::size_type idx = buffer.find(' '); 330 if (idx == string::npos) 331 continue; 332 333 string address = "0x" + buffer.substr(0, idx); 334 eat_white(address); 335 if (address.empty()) 336 continue; 337 338 // Skip over letter and space 339 string symbol = buffer.substr(idx + 3); 340 eat_white(symbol); 341 if (symbol.empty()) 342 continue; 343 344 Addr addr; 345 if (!to_number(address, addr)) 346 continue; 347 348 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol)) 349 continue; 350 351 352 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 353 } 354 file.close(); 355} 356 357void 358addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) 359{ 360 DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n", 361 addr, symbolAddr); 362 if (!FullSystem) 363 panicFsOnlyPseudoInst("addSymbol"); 364 365 char symb[100]; 366 CopyStringOut(tc, symb, symbolAddr, 100); 367 std::string symbol(symb); 368 369 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr); 370 371 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol); 372 debugSymbolTable->insert(addr,symbol); 373} 374 375uint64_t 376initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2) 377{ 378 DPRINTF(PseudoInst, "PseudoInst::initParam() key:%s%s\n", (char *)&key_str1, 379 (char *)&key_str2); 380 if (!FullSystem) { 381 panicFsOnlyPseudoInst("initParam"); 382 return 0; 383 } 384 385 // The key parameter string is passed in via two 64-bit registers. We copy 386 // out the characters from the 64-bit integer variables here and concatenate 387 // them in the key_str character buffer 388 const int len = 2 * sizeof(uint64_t) + 1; 389 char key_str[len]; 390 memset(key_str, '\0', len); 391 if (key_str1 == 0) { 392 assert(key_str2 == 0); 393 } else { 394 strncpy(key_str, (char *)&key_str1, sizeof(uint64_t)); 395 } 396 397 if (strlen(key_str) == sizeof(uint64_t)) { 398 strncpy(key_str + sizeof(uint64_t), (char *)&key_str2, 399 sizeof(uint64_t)); 400 } else { 401 assert(key_str2 == 0); 402 } 403 404 // Compare the key parameter with the known values to select the return 405 // value 406 uint64_t val; 407 if (strcmp(key_str, InitParamKey::DEFAULT) == 0) { 408 val = tc->getCpuPtr()->system->init_param; 409 } else if (strcmp(key_str, InitParamKey::DIST_RANK) == 0) { 410 val = DistIface::rankParam(); 411 } else if (strcmp(key_str, InitParamKey::DIST_SIZE) == 0) { 412 val = DistIface::sizeParam(); 413 } else { 414 panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str); 415 } 416 return val; 417} 418 419 420void 421resetstats(ThreadContext *tc, Tick delay, Tick period) 422{ 423 DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period); 424 if (!tc->getCpuPtr()->params()->do_statistics_insts) 425 return; 426 427 428 Tick when = curTick() + delay * SimClock::Int::ns; 429 Tick repeat = period * SimClock::Int::ns; 430 431 Stats::schedStatEvent(false, true, when, repeat); 432} 433 434void 435dumpstats(ThreadContext *tc, Tick delay, Tick period) 436{ 437 DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period); 438 if (!tc->getCpuPtr()->params()->do_statistics_insts) 439 return; 440 441 442 Tick when = curTick() + delay * SimClock::Int::ns; 443 Tick repeat = period * SimClock::Int::ns; 444 445 Stats::schedStatEvent(true, false, when, repeat); 446} 447 448void 449dumpresetstats(ThreadContext *tc, Tick delay, Tick period) 450{ 451 DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period); 452 if (!tc->getCpuPtr()->params()->do_statistics_insts) 453 return; 454 455 456 Tick when = curTick() + delay * SimClock::Int::ns; 457 Tick repeat = period * SimClock::Int::ns; 458 459 Stats::schedStatEvent(true, true, when, repeat); 460} 461 462void 463m5checkpoint(ThreadContext *tc, Tick delay, Tick period) 464{ 465 DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period); 466 if (!tc->getCpuPtr()->params()->do_checkpoint_insts) 467 return; 468 469 if (DistIface::readyToCkpt(delay, period)) { 470 Tick when = curTick() + delay * SimClock::Int::ns; 471 Tick repeat = period * SimClock::Int::ns; 472 exitSimLoop("checkpoint", 0, when, repeat); 473 } 474} 475 476uint64_t 477readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) 478{ 479 DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n", 480 vaddr, len, offset); 481 if (!FullSystem) { 482 panicFsOnlyPseudoInst("readfile"); 483 return 0; 484 } 485 486 const string &file = tc->getSystemPtr()->params()->readfile; 487 if (file.empty()) { 488 return ULL(0); 489 } 490 491 uint64_t result = 0; 492 493 int fd = ::open(file.c_str(), O_RDONLY, 0); 494 if (fd < 0) 495 panic("could not open file %s\n", file); 496 497 if (::lseek(fd, offset, SEEK_SET) < 0) 498 panic("could not seek: %s", strerror(errno)); 499 500 char *buf = new char[len]; 501 char *p = buf; 502 while (len > 0) { 503 int bytes = ::read(fd, p, len); 504 if (bytes <= 0) 505 break; 506 507 p += bytes; 508 result += bytes; 509 len -= bytes; 510 } 511 512 close(fd); 513 CopyIn(tc, vaddr, buf, result); 514 delete [] buf; 515 return result; 516} 517 518uint64_t 519writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, 520 Addr filename_addr) 521{ 522 DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n", 523 vaddr, len, offset, filename_addr); 524 525 // copy out target filename 526 char fn[100]; 527 std::string filename; 528 CopyStringOut(tc, fn, filename_addr, 100); 529 filename = std::string(fn); 530 531 OutputStream *out; 532 if (offset == 0) { 533 // create a new file (truncate) 534 out = simout.create(filename, true, true); 535 } else { 536 // do not truncate file if offset is non-zero 537 // (ios::in flag is required as well to keep the existing data 538 // intact, otherwise existing data will be zeroed out.) 539 out = simout.open(filename, ios::in | ios::out | ios::binary, true); 540 } 541 542 ostream *os(out->stream()); 543 if (!os) 544 panic("could not open file %s\n", filename); 545 546 // seek to offset 547 os->seekp(offset); 548 549 // copy out data and write to file 550 char *buf = new char[len]; 551 CopyOut(tc, buf, vaddr, len); 552 os->write(buf, len); 553 if (os->fail() || os->bad()) 554 panic("Error while doing writefile!\n"); 555 556 simout.close(out); 557 558 delete [] buf; 559 560 return len; 561} 562 563void 564debugbreak(ThreadContext *tc) 565{ 566 DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n"); 567 Debug::breakpoint(); 568} 569 570void 571switchcpu(ThreadContext *tc) 572{ 573 DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n"); 574 exitSimLoop("switchcpu"); 575} 576 577// 578// This function is executed when annotated work items begin. Depending on 579// what the user specified at the command line, the simulation may exit and/or 580// take a checkpoint when a certain work item begins. 581// 582void 583workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) 584{ 585 DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid); 586 System *sys = tc->getSystemPtr(); 587 const System::Params *params = sys->params(); 588 589 if (params->exit_on_work_items) { 590 exitSimLoop("workbegin", static_cast<int>(workid)); 591 return; 592 } 593 594 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid, 595 threadid); 596 tc->getCpuPtr()->workItemBegin(); 597 sys->workItemBegin(threadid, workid); 598 599 // 600 // If specified, determine if this is the specific work item the user 601 // identified 602 // 603 if (params->work_item_id == -1 || params->work_item_id == workid) { 604 605 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin(); 606 int cpuId = tc->getCpuPtr()->cpuId(); 607 608 if (params->work_cpus_ckpt_count != 0 && 609 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 610 // 611 // If active cpus equals checkpoint count, create checkpoint 612 // 613 exitSimLoop("checkpoint"); 614 } 615 616 if (systemWorkBeginCount == params->work_begin_ckpt_count) { 617 // 618 // Note: the string specified as the cause of the exit event must 619 // exactly equal "checkpoint" inorder to create a checkpoint 620 // 621 exitSimLoop("checkpoint"); 622 } 623 624 if (systemWorkBeginCount == params->work_begin_exit_count) { 625 // 626 // If a certain number of work items started, exit simulation 627 // 628 exitSimLoop("work started count reach"); 629 } 630 631 if (cpuId == params->work_begin_cpu_id_exit) { 632 // 633 // If work started on the cpu id specified, exit simulation 634 // 635 exitSimLoop("work started on specific cpu"); 636 } 637 } 638} 639 640// 641// This function is executed when annotated work items end. Depending on 642// what the user specified at the command line, the simulation may exit and/or 643// take a checkpoint when a certain work item ends. 644// 645void 646workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) 647{ 648 DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid); 649 System *sys = tc->getSystemPtr(); 650 const System::Params *params = sys->params(); 651 652 if (params->exit_on_work_items) { 653 exitSimLoop("workend", static_cast<int>(workid)); 654 return; 655 } 656 657 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid); 658 tc->getCpuPtr()->workItemEnd(); 659 sys->workItemEnd(threadid, workid); 660 661 // 662 // If specified, determine if this is the specific work item the user 663 // identified 664 // 665 if (params->work_item_id == -1 || params->work_item_id == workid) { 666 667 uint64_t systemWorkEndCount = sys->incWorkItemsEnd(); 668 int cpuId = tc->getCpuPtr()->cpuId(); 669 670 if (params->work_cpus_ckpt_count != 0 && 671 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 672 // 673 // If active cpus equals checkpoint count, create checkpoint 674 // 675 exitSimLoop("checkpoint"); 676 } 677 678 if (params->work_end_ckpt_count != 0 && 679 systemWorkEndCount == params->work_end_ckpt_count) { 680 // 681 // If total work items completed equals checkpoint count, create 682 // checkpoint 683 // 684 exitSimLoop("checkpoint"); 685 } 686 687 if (params->work_end_exit_count != 0 && 688 systemWorkEndCount == params->work_end_exit_count) { 689 // 690 // If total work items completed equals exit count, exit simulation 691 // 692 exitSimLoop("work items exit count reached"); 693 } 694 } 695} 696 697} // namespace PseudoInst 698