process.hh revision 10932:cafae9abd4e4
15081Sgblack@eecs.umich.edu/*
25081Sgblack@eecs.umich.edu * Copyright (c) 2014 Advanced Micro Devices, Inc.
35081Sgblack@eecs.umich.edu * Copyright (c) 2001-2005 The Regents of The University of Michigan
45081Sgblack@eecs.umich.edu * All rights reserved.
55081Sgblack@eecs.umich.edu *
65081Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without
75081Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are
85081Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright
95081Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
105081Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright
115081Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the
125081Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution;
135081Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its
145081Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from
155081Sgblack@eecs.umich.edu * this software without specific prior written permission.
165081Sgblack@eecs.umich.edu *
175081Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
185081Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
195081Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
205081Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
215081Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
225081Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
235081Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
245081Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
255081Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
265081Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
275081Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
285081Sgblack@eecs.umich.edu *
295081Sgblack@eecs.umich.edu * Authors: Nathan Binkert
305081Sgblack@eecs.umich.edu *          Steve Reinhardt
315081Sgblack@eecs.umich.edu */
325081Sgblack@eecs.umich.edu
335081Sgblack@eecs.umich.edu#ifndef __PROCESS_HH__
345081Sgblack@eecs.umich.edu#define __PROCESS_HH__
355081Sgblack@eecs.umich.edu
365081Sgblack@eecs.umich.edu#include <array>
375081Sgblack@eecs.umich.edu#include <string>
385081Sgblack@eecs.umich.edu#include <vector>
395081Sgblack@eecs.umich.edu
405081Sgblack@eecs.umich.edu#include "arch/registers.hh"
415081Sgblack@eecs.umich.edu#include "base/statistics.hh"
425081Sgblack@eecs.umich.edu#include "base/types.hh"
435081Sgblack@eecs.umich.edu#include "config/the_isa.hh"
445081Sgblack@eecs.umich.edu#include "mem/se_translating_port_proxy.hh"
455081Sgblack@eecs.umich.edu#include "sim/fd_entry.hh"
465081Sgblack@eecs.umich.edu#include "sim/sim_object.hh"
475081Sgblack@eecs.umich.edu#include "sim/syscallreturn.hh"
485081Sgblack@eecs.umich.edu
495081Sgblack@eecs.umich.educlass PageTable;
505081Sgblack@eecs.umich.edustruct ProcessParams;
515081Sgblack@eecs.umich.edustruct LiveProcessParams;
525081Sgblack@eecs.umich.educlass SyscallDesc;
535081Sgblack@eecs.umich.educlass System;
545081Sgblack@eecs.umich.educlass ThreadContext;
555081Sgblack@eecs.umich.educlass EmulatedDriver;
565081Sgblack@eecs.umich.edu
576584Sgblack@eecs.umich.edutemplate<class IntType>
586584Sgblack@eecs.umich.edustruct AuxVector
596584Sgblack@eecs.umich.edu{
606584Sgblack@eecs.umich.edu    IntType a_type;
616584Sgblack@eecs.umich.edu    IntType a_val;
626584Sgblack@eecs.umich.edu
636584Sgblack@eecs.umich.edu    AuxVector()
646584Sgblack@eecs.umich.edu    {}
656584Sgblack@eecs.umich.edu
666584Sgblack@eecs.umich.edu    AuxVector(IntType type, IntType val);
676584Sgblack@eecs.umich.edu};
686584Sgblack@eecs.umich.edu
696584Sgblack@eecs.umich.educlass Process : public SimObject
706584Sgblack@eecs.umich.edu{
716584Sgblack@eecs.umich.edu  public:
726584Sgblack@eecs.umich.edu
736584Sgblack@eecs.umich.edu    /// Pointer to object representing the system this process is
746584Sgblack@eecs.umich.edu    /// running on.
756584Sgblack@eecs.umich.edu    System *system;
766584Sgblack@eecs.umich.edu
776584Sgblack@eecs.umich.edu    // thread contexts associated with this process
786584Sgblack@eecs.umich.edu    std::vector<int> contextIds;
796584Sgblack@eecs.umich.edu
806584Sgblack@eecs.umich.edu    // number of CPUs (esxec contexts, really) assigned to this process.
816584Sgblack@eecs.umich.edu    unsigned int numCpus() { return contextIds.size(); }
826584Sgblack@eecs.umich.edu
836584Sgblack@eecs.umich.edu    // record of blocked context
846584Sgblack@eecs.umich.edu    struct WaitRec
856584Sgblack@eecs.umich.edu    {
866584Sgblack@eecs.umich.edu        Addr waitChan;
876584Sgblack@eecs.umich.edu        ThreadContext *waitingContext;
886584Sgblack@eecs.umich.edu
896584Sgblack@eecs.umich.edu        WaitRec(Addr chan, ThreadContext *ctx)
906584Sgblack@eecs.umich.edu            : waitChan(chan), waitingContext(ctx)
916584Sgblack@eecs.umich.edu        {       }
926584Sgblack@eecs.umich.edu    };
936584Sgblack@eecs.umich.edu
946584Sgblack@eecs.umich.edu    // list of all blocked contexts
956584Sgblack@eecs.umich.edu    std::list<WaitRec> waitList;
966584Sgblack@eecs.umich.edu
976584Sgblack@eecs.umich.edu    Addr brk_point;             // top of the data segment
986584Sgblack@eecs.umich.edu
996584Sgblack@eecs.umich.edu    Addr stack_base;            // stack segment base (highest address)
1006584Sgblack@eecs.umich.edu    unsigned stack_size;        // initial stack size
1016584Sgblack@eecs.umich.edu    Addr stack_min;             // lowest address accessed on the stack
1026584Sgblack@eecs.umich.edu
1036584Sgblack@eecs.umich.edu    // The maximum size allowed for the stack.
1046584Sgblack@eecs.umich.edu    Addr max_stack_size;
1056584Sgblack@eecs.umich.edu
1066584Sgblack@eecs.umich.edu    // addr to use for next stack region (for multithreaded apps)
1076584Sgblack@eecs.umich.edu    Addr next_thread_stack_base;
1086584Sgblack@eecs.umich.edu
1096584Sgblack@eecs.umich.edu    // Base of region for mmaps (when user doesn't specify an address).
1106584Sgblack@eecs.umich.edu    Addr mmap_start;
1116584Sgblack@eecs.umich.edu    Addr mmap_end;
1126584Sgblack@eecs.umich.edu
1135081Sgblack@eecs.umich.edu    // Base of region for nxm data
114    Addr nxm_start;
115    Addr nxm_end;
116
117    Stats::Scalar num_syscalls;       // number of syscalls executed
118
119  protected:
120    // constructor
121    Process(ProcessParams *params);
122
123    virtual void initState();
124
125    DrainState drain() M5_ATTR_OVERRIDE;
126
127  public:
128
129    //This id is assigned by m5 and is used to keep process' tlb entries
130    //separated.
131    uint64_t M5_pid;
132
133    // flag for using architecture specific page table
134    bool useArchPT;
135    // running KvmCPU in SE mode requires special initialization
136    bool kvmInSE;
137
138    PageTableBase* pTable;
139
140  protected:
141    /// Memory proxy for initialization (image loading)
142    SETranslatingPortProxy initVirtMem;
143
144  private:
145    static const int NUM_FDS = 1024;
146
147    // File descriptor remapping support.
148    std::shared_ptr<std::array<FDEntry, NUM_FDS>> fd_array;
149
150    // Standard file descriptor options for initialization and checkpoints.
151    std::map<std::string, int> imap;
152    std::map<std::string, int> oemap;
153
154  public:
155    // inherit file descriptor map from another process (necessary for clone)
156    void inheritFDArray(Process *p);
157
158    // override of virtual SimObject method: register statistics
159    virtual void regStats();
160
161    // After getting registered with system object, tell process which
162    // system-wide context id it is assigned.
163    void assignThreadContext(int context_id)
164    {
165        contextIds.push_back(context_id);
166    }
167
168    // Find a free context to use
169    ThreadContext *findFreeContext();
170
171    // provide program name for debug messages
172    virtual const char *progName() const { return "<unknown>"; }
173
174    // generate new target fd for sim_fd
175    int allocFD(int sim_fd, const std::string& filename, int flags, int mode,
176                bool pipe);
177
178    // disassociate target fd with simulator fd and cleanup subsidiary fields
179    void resetFDEntry(int tgt_fd);
180
181    // look up simulator fd for given target fd
182    int getSimFD(int tgt_fd);
183
184    // look up fd entry for a given target fd
185    FDEntry *getFDEntry(int tgt_fd);
186
187    // look up target fd for given host fd
188    // Assumes a 1:1 mapping between target file descriptor and host file
189    // descriptor. Given the current API, this must be true given that it's
190    // not possible to map multiple target file descriptors to the same host
191    // file descriptor
192    int getTgtFD(int sim_fd);
193
194    // fix all offsets for currently open files and save them
195    void fixFileOffsets();
196
197    // find all offsets for currently open files and save them
198    void findFileOffsets();
199
200    // set the source of this read pipe for a checkpoint resume
201    void setReadPipeSource(int read_pipe_fd, int source_fd);
202
203    virtual void syscall(int64_t callnum, ThreadContext *tc) = 0;
204
205    void allocateMem(Addr vaddr, int64_t size, bool clobber = false);
206
207    /// Attempt to fix up a fault at vaddr by allocating a page on the stack.
208    /// @return Whether the fault has been fixed.
209    bool fixupStackFault(Addr vaddr);
210
211    /**
212     * Maps a contiguous range of virtual addresses in this process's
213     * address space to a contiguous range of physical addresses.
214     * This function exists primarily to expose the map operation to
215     * python, so that configuration scripts can set up mappings in SE mode.
216     *
217     * @param vaddr The starting virtual address of the range.
218     * @param paddr The starting physical address of the range.
219     * @param size The length of the range in bytes.
220     * @param cacheable Specifies whether accesses are cacheable.
221     * @return True if the map operation was successful.  (At this
222     *           point in time, the map operation always succeeds.)
223     */
224    bool map(Addr vaddr, Addr paddr, int size, bool cacheable = true);
225
226    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
227    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
228};
229
230//
231// "Live" process with system calls redirected to host system
232//
233class ObjectFile;
234class LiveProcess : public Process
235{
236  protected:
237    ObjectFile *objFile;
238    std::vector<std::string> argv;
239    std::vector<std::string> envp;
240    std::string cwd;
241
242    LiveProcess(LiveProcessParams *params, ObjectFile *objFile);
243
244    // Id of the owner of the process
245    uint64_t __uid;
246    uint64_t __euid;
247    uint64_t __gid;
248    uint64_t __egid;
249
250    // pid of the process and it's parent
251    uint64_t __pid;
252    uint64_t __ppid;
253
254    // Emulated drivers available to this process
255    std::vector<EmulatedDriver *> drivers;
256
257  public:
258
259    enum AuxiliaryVectorType {
260        M5_AT_NULL = 0,
261        M5_AT_IGNORE = 1,
262        M5_AT_EXECFD = 2,
263        M5_AT_PHDR = 3,
264        M5_AT_PHENT = 4,
265        M5_AT_PHNUM = 5,
266        M5_AT_PAGESZ = 6,
267        M5_AT_BASE = 7,
268        M5_AT_FLAGS = 8,
269        M5_AT_ENTRY = 9,
270        M5_AT_NOTELF = 10,
271        M5_AT_UID = 11,
272        M5_AT_EUID = 12,
273        M5_AT_GID = 13,
274        M5_AT_EGID = 14,
275        // The following may be specific to Linux
276        M5_AT_PLATFORM = 15,
277        M5_AT_HWCAP = 16,
278        M5_AT_CLKTCK = 17,
279
280        M5_AT_SECURE = 23,
281        M5_BASE_PLATFORM = 24,
282        M5_AT_RANDOM = 25,
283
284        M5_AT_EXECFN = 31,
285
286        M5_AT_VECTOR_SIZE = 44
287    };
288
289    inline uint64_t uid() {return __uid;}
290    inline uint64_t euid() {return __euid;}
291    inline uint64_t gid() {return __gid;}
292    inline uint64_t egid() {return __egid;}
293    inline uint64_t pid() {return __pid;}
294    inline uint64_t ppid() {return __ppid;}
295
296    // provide program name for debug messages
297    virtual const char *progName() const { return argv[0].c_str(); }
298
299    std::string
300    fullPath(const std::string &filename)
301    {
302        if (filename[0] == '/' || cwd.empty())
303            return filename;
304
305        std::string full = cwd;
306
307        if (cwd[cwd.size() - 1] != '/')
308            full += '/';
309
310        return full + filename;
311    }
312
313    std::string getcwd() const { return cwd; }
314
315    virtual void syscall(int64_t callnum, ThreadContext *tc);
316
317    virtual TheISA::IntReg getSyscallArg(ThreadContext *tc, int &i) = 0;
318    virtual TheISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width);
319    virtual void setSyscallArg(ThreadContext *tc,
320            int i, TheISA::IntReg val) = 0;
321    virtual void setSyscallReturn(ThreadContext *tc,
322            SyscallReturn return_value) = 0;
323
324    virtual SyscallDesc *getDesc(int callnum) = 0;
325
326    /**
327     * Find an emulated device driver.
328     *
329     * @param filename Name of the device (under /dev)
330     * @return Pointer to driver object if found, else NULL
331     */
332    EmulatedDriver *findDriver(std::string filename);
333
334    // this function is used to create the LiveProcess object, since
335    // we can't tell which subclass of LiveProcess to use until we
336    // open and look at the object file.
337    static LiveProcess *create(LiveProcessParams *params);
338};
339
340
341#endif // __PROCESS_HH__
342