debug.cc revision 5543
12SN/A/*
21762SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert
292665Ssaidi@eecs.umich.edu *          Steve Reinhardt
302SN/A */
312SN/A
322SN/A#include <sys/types.h>
332SN/A#include <signal.h>
342SN/A#include <unistd.h>
352SN/A
362SN/A#include <string>
372SN/A#include <vector>
382SN/A
3956SN/A#include "sim/debug.hh"
4056SN/A#include "sim/eventq.hh"
4156SN/A#include "sim/sim_events.hh"
422SN/A
432SN/Ausing namespace std;
442SN/A
452SN/Avoid
462SN/Adebug_break()
472SN/A{
481252SN/A#ifndef NDEBUG
492SN/A    kill(getpid(), SIGTRAP);
501252SN/A#else
511252SN/A    cprintf("debug_break suppressed, compiled with NDEBUG\n");
521252SN/A#endif
532SN/A}
542SN/A
552SN/A//
562SN/A// Debug event: place a breakpoint on the process function and
572SN/A// schedule the event to break at a particular cycle
582SN/A//
592SN/Aclass DebugBreakEvent : public Event
602SN/A{
612SN/A  public:
622SN/A
632SN/A    DebugBreakEvent(EventQueue *q, Tick _when);
642SN/A
655543Ssaidi@eecs.umich.edu    void process();     // process event
665336Shines@cs.fsu.edu    virtual const char *description() const;
672SN/A};
682SN/A
692SN/A//
702SN/A// constructor: schedule at specified time
712SN/A//
722SN/ADebugBreakEvent::DebugBreakEvent(EventQueue *q, Tick _when)
73396SN/A    : Event(q, Debug_Break_Pri)
742SN/A{
75381SN/A    setFlags(AutoDelete);
76396SN/A    schedule(_when);
772SN/A}
782SN/A
792SN/A//
802SN/A// handle debug event: set debugger breakpoint on this function
812SN/A//
822SN/Avoid
832SN/ADebugBreakEvent::process()
842SN/A{
852SN/A    debug_break();
862SN/A}
872SN/A
882SN/A
892SN/Aconst char *
905336Shines@cs.fsu.eduDebugBreakEvent::description() const
912SN/A{
922SN/A    return "debug break";
932SN/A}
942SN/A
952SN/A//
962SN/A// handy function to schedule DebugBreakEvent on main event queue
972SN/A// (callable from debugger)
982SN/A//
993645Sbinkertn@umich.eduvoid
1003645Sbinkertn@umich.eduschedBreakCycle(Tick when)
1012SN/A{
1022SN/A    new DebugBreakEvent(&mainEventQueue, when);
1032SN/A}
1042SN/A
1053645Sbinkertn@umich.eduvoid
1063645Sbinkertn@umich.edueventqDump()
1072SN/A{
1082SN/A    mainEventQueue.dump();
1092SN/A}
1102SN/A
1115512SMichael.Adler@intel.com
1125512SMichael.Adler@intel.comint remote_gdb_base_port = 7000;
1135512SMichael.Adler@intel.com
1145512SMichael.Adler@intel.comint
1155512SMichael.Adler@intel.comgetRemoteGDBPort()
1165512SMichael.Adler@intel.com{
1175512SMichael.Adler@intel.com    return remote_gdb_base_port;
1185512SMichael.Adler@intel.com}
1195512SMichael.Adler@intel.com
1205512SMichael.Adler@intel.com// Set remote GDB base port.  0 means disable remote GDB.
1215512SMichael.Adler@intel.com// Callable from python.
1225512SMichael.Adler@intel.comvoid
1235512SMichael.Adler@intel.comsetRemoteGDBPort(int port)
1245512SMichael.Adler@intel.com{
1255512SMichael.Adler@intel.com    remote_gdb_base_port = port;
1265512SMichael.Adler@intel.com}
1275512SMichael.Adler@intel.com
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