core.cc revision 11793
1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * Copyright (c) 2013 Mark D. Hill and David A. Wood 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer; 11 * redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution; 14 * neither the name of the copyright holders nor the names of its 15 * contributors may be used to endorse or promote products derived from 16 * this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * Authors: Nathan Binkert 31 * Steve Reinhardt 32 */ 33 34#include "sim/core.hh" 35 36#include <iostream> 37#include <string> 38 39#include "base/callback.hh" 40#include "base/output.hh" 41#include "sim/eventq.hh" 42 43using namespace std; 44 45namespace SimClock { 46/// The simulated frequency of curTick(). (In ticks per second) 47Tick Frequency; 48 49namespace Float { 50double s; 51double ms; 52double us; 53double ns; 54double ps; 55 56double Hz; 57double kHz; 58double MHz; 59double GHZ; 60} // namespace Float 61 62namespace Int { 63Tick s; 64Tick ms; 65Tick us; 66Tick ns; 67Tick ps; 68} // namespace Float 69 70} // namespace SimClock 71 72void 73setClockFrequency(Tick ticksPerSecond) 74{ 75 using namespace SimClock; 76 Frequency = ticksPerSecond; 77 Float::s = static_cast<double>(Frequency); 78 Float::ms = Float::s / 1.0e3; 79 Float::us = Float::s / 1.0e6; 80 Float::ns = Float::s / 1.0e9; 81 Float::ps = Float::s / 1.0e12; 82 83 Float::Hz = 1.0 / Float::s; 84 Float::kHz = 1.0 / Float::ms; 85 Float::MHz = 1.0 / Float::us; 86 Float::GHZ = 1.0 / Float::ns; 87 88 Int::s = Frequency; 89 Int::ms = Int::s / 1000; 90 Int::us = Int::ms / 1000; 91 Int::ns = Int::us / 1000; 92 Int::ps = Int::ns / 1000; 93 94} 95 96void 97setOutputDir(const string &dir) 98{ 99 simout.setDirectory(dir); 100} 101 102/** 103 * Queue of C++ callbacks to invoke on simulator exit. 104 */ 105inline CallbackQueue & 106exitCallbacks() 107{ 108 static CallbackQueue theQueue; 109 return theQueue; 110} 111 112/** 113 * Register an exit callback. 114 */ 115void 116registerExitCallback(Callback *callback) 117{ 118 exitCallbacks().add(callback); 119} 120 121/** 122 * Do C++ simulator exit processing. Exported to SWIG to be invoked 123 * when simulator terminates via Python's atexit mechanism. 124 */ 125void 126doExitCleanup() 127{ 128 exitCallbacks().process(); 129 exitCallbacks().clear(); 130 131 cout.flush(); 132} 133 134